DuneNvme 1.0.2 This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment. |
This is a very basic module to simulate an NVMe device connected via PCIe to the Xilinx PCIe Gen3 IP block. More...
![](classNvmeSim.png)
Entities | |
Behavioral | architecture |
Libraries | |
ieee | |
unisim | |
work |
Use Clauses | |
std_logic_1164 | |
numeric_std | |
vcomponents | |
NvmeStoragePkg | Package <NvmeStoragePkg> |
NvmeStorageIntPkg | Package <NvmeStorageIntPkg> |
Generics | |
Simulate | boolean := True |
BlockSize | integer := NvmeStorageBlockSize |
System block size. |
Ports | ||
clk | in | std_logic |
The input clock. | ||
reset | in | std_logic |
The reset line. | ||
hostReq | inout | AxisStreamType := AxisStreamInput |
Host request stream. | ||
hostReply | inout | AxisStreamType := AxisStreamOutput |
Host reply stream. | ||
nvmeReq | inout | AxisStreamType := AxisStreamOutput |
Nvme request stream (bus master) | ||
nvmeReply | inout | AxisStreamType := AxisStreamInput |
Nvme reply stream. |
Detailed Description
This is a very basic module to simulate an NVMe device connected via PCIe to the Xilinx PCIe Gen3 IP block.
- Date
- 2020-03-13
- Version
- 1.0.0
This is a very basic module to simulate an NVMe device connected via PCIe to the Xilinx PCIe Gen3 IP block.
It has a simple AXI4 Stream interface matching that as used by the Xilinx PCIe Gen3 IP block. It is designed to help with the testing of the NvmeStorage blocks operation during simulation of the VHDL.
The core responds to specific configuration space writes and specific NVMe register writes (Queue door bell registers). The module makes PCIe read/write requests to access the request/reply queues and data input/output memory in a similar manner to a real NVMe device.
It has a simple interface ignoring actual data values and 32bit dataword positions within 128 bit transfered words.
NVMe requests are not pipelined and carried out one at a time, in sequence. Currently does not perform configuration or NVMe register read operations. NvmeSim is still pretty basic.
- Copyright
- 2020 Beam Ltd, Apache License, Version 2.0 Copyright 2020 Beam Ltd Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
The documentation for this class was generated from the following file:
- /src/dune/source/DuneNvme/src/NvmeSim.vhd
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