| DuneNvme 1.0.2 This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment. |
Constants | Components | Records | Subtypes | Types | Signals | Functions | Processes | Instantiations
Behavioral Architecture Reference
Functions | |
| std_logic_vector | setHeader ( request: in integer address: in integer count: in integer tag: in integer ) |
| Set the fields in the PCIe TLP header. | |
| integer | incrementPos ( v: in integer ) |
| unsigned | bufferAddress ( bufferNum: in integer ) |
| The RAM start address for a particular numbered buffer. | |
| std_logic_vector | pcieAddress ( bufferNum: in integer ) |
| The Pcie address for a particular numbered buffer to give to the Nvme device. | |
| unsigned | numTrimBlocksNvme ( total: in unsigned , current: in unsigned ) |
| The number of blocks to trim based on how many 4k blocks left to trim. | |
| unsigned | numTrimBlocks ( total: in unsigned , current: in unsigned ) |
| std_logic_vector | setHeader ( request: in integer address: in integer count: in integer tag: in integer ) |
| Set the fields in the PCIe TLP header. | |
Processes | |
| PROCESS_22 | ( clk ) |
| PROCESS_23 | ( clk ) |
| PROCESS_24 | ( clk ) |
| PROCESS_25 | ( clk ) |
| PROCESS_26 | ( clk ) |
| PROCESS_27 | ( clk ) |
| PROCESS_28 | ( clk ) |
| PROCESS_29 | ( clk ) |
Components | |
| Ram | <Entity Ram> |
| The Buffer size in 128 bit words. | |
| Fifo | <Entity Fifo> |
| The active high reset line. | |
| DataFifo | |
| Generate simulation core. | |
Constants | |
| TCQ | time := 1 ns |
| SimDelay | boolean := False |
| Input data delay after each packet for simulation tests. | |
| SimWaitReply | boolean := False |
| Wait for each write command to return a reply. | |
| DoTrim | boolean := False |
| Perform trim/deallocate functionality. | |
| DoWrite | boolean := True |
| Perform write blocks. | |
| NvmeBlocks | integer := BlockSize / NvmeBlockSize |
| The number of Nvme blocks per NvmeStorage system block. | |
| RamSize | integer := ( NvmeWriteNum * BlockSize ) / 16 |
| One block per write buffer. | |
| AddressWidth | integer := log2 ( RamSize ) |
| BlockSizeWidth | integer := log2 ( BlockSize ) |
| TrimNum | integer := ( 32768 / NvmeBlocks ) |
| The number of 4k blocks trimmed in one trim instructions. | |
| NumBlocksRun | integer := 262144 |
| The total number of blocks in a run. | |
| NvmeBlocks | integer := NvmeStorageBlockSize / 512 |
| The number of Nvme blocks per NvmeStorage system block. | |
Types | |
| BufferArrayType | ( 0 to NvmeWriteNum - 1 ) BufferType |
| InStateType | ( INSTATE_IDLE , INSTATE_INIT , INSTATE_CHOOSE , INSTATE_INPUT_BLOCK , INSTATE_DELAY , INSTATE_COMPLETE ) |
| StateType | ( STATE_IDLE , STATE_INIT , STATE_RUN , STATE_COMPLETE , STATE_WQUEUE_HEAD , STATE_WQUEUE_0 , STATE_WQUEUE_1 , STATE_WQUEUE_2 , STATE_WQUEUE_3 , STATE_WQUEUE_WAIT_REPLY , STATE_TQUEUE_HEAD , STATE_TQUEUE_0 , STATE_TQUEUE_1 , STATE_TQUEUE_2 , STATE_TQUEUE_3 , STATE_TQUEUE_WAIT_REPLY ) |
| ReplyStateType | ( REPSTATE_IDLE , REPSTATE_INIT , REPSTATE_COMPLETE , REPSTATE_QUEUE_REPLY1 , REPSTATE_QUEUE_REPLY2 , REPSTATE_QUEUE_REPLY3 ) |
| ProcessQueueType | ( 0 to NvmeWriteNum ) integer range 0 to NvmeWriteNum - 1 |
| MemStateType | ( MEMSTATE_IDLE , MEMSTATE_READSTART , MEMSTATE_READHEAD , MEMSTATE_READDATA ) |
| StateType | ( STATE_IDLE , STATE_INIT , STATE_RUN , STATE_COMPLETE , STATE_QUEUE_HEAD , STATE_QUEUE_0 , STATE_QUEUE_1 , STATE_QUEUE_2 , STATE_QUEUE_3 , STATE_WAIT_REPLY ) |
| Output data stream. | |
| ReplyStateType | ( REPLY_STATE_QUEUE_REPLY1 , REPLY_STATE_QUEUE_REPLY2 ) |
| MemStateType | ( MEMSTATE_IDLE , MEMSTATE_READHEAD , MEMSTATE_READDATA ) |
Subtypes | |
| RegisterType | unsigned ( 31 downto 0 ) |
Signals | |
| inState | InStateType := INSTATE_IDLE |
| state | StateType := STATE_IDLE |
| replyState | ReplyStateType := REPSTATE_QUEUE_REPLY1 |
| complete_l | std_logic := ' 0 ' |
| blockNumberIn | unsigned ( 31 downto 0 ) := ( others = > ' 0 ' ) |
| Input block number. | |
| numBlocksProc | unsigned ( 31 downto 0 ) := ( others = > ' 0 ' ) |
| Number of block write requests sent. | |
| numBlocksDone | unsigned ( 31 downto 0 ) := ( others = > ' 0 ' ) |
| Number of block write completions received. | |
| numBlocksTrimmed | unsigned ( 31 downto 0 ) := ( others = > ' 0 ' ) |
| Number of blocks trimmed. | |
| trimQueueProc | unsigned ( 3 downto 0 ) := ( others = > ' 0 ' ) |
| The number of trim tasks in progress. | |
| trimQueueDone | unsigned ( 3 downto 0 ) := ( others = > ' 0 ' ) |
| The number of trim tasks completed. | |
| writeEnable | std_logic := ' 0 ' |
| writeAddress | unsigned ( AddressWidth- 1 downto 0 ) := ( others = > ' 0 ' ) |
| readEnable | std_logic := ' 0 ' |
| readAddress | unsigned ( AddressWidth- 1 downto 0 ) := ( others = > ' 0 ' ) |
| readData | std_logic_vector ( 127 downto 0 ) := ( others = > ' 0 ' ) |
| buffers | BufferArrayType := ( others = > ( ' Z ' , ' Z ' , ( others = > ' Z ' ) , ( others = > ' Z ' ) ) ) |
| bufferInNum | integer range 0 to NvmeWriteNum - 1 := 0 |
| bufferOutNum | integer range 0 to NvmeWriteNum - 1 := 0 |
| processQueue | ProcessQueueType := ( others = > 0 ) |
| processQueueIn | integer range 0 to NvmeWriteNum := 0 |
| processQueueOut | integer range 0 to NvmeWriteNum := 0 |
| memState | MemStateType := MEMSTATE_IDLE |
| memRequestHead | PcieRequestHeadType |
| memRequestHead1 | PcieRequestHeadType |
| memReplyHead | PcieReplyHeadType |
| nvmeReplyHead | NvmeReplyHeadType |
| memCount | unsigned ( 10 downto 0 ) |
| memChunkCount | unsigned ( 10 downto 0 ) |
| readValid0 | std_logic |
| readValid1 | std_logic |
| fifoReset | std_logic |
| fifoNearFull | std_logic |
| fifoInReady | std_logic |
| fifoOutValid | std_logic |
| fifoOutReady | std_logic |
| fifoData0 | std_logic_vector ( 127 downto 0 ) |
| fifoData1 | std_logic_vector ( 127 downto 0 ) |
| dataChunkStart | RegisterType := ( others = > ' 0 ' ) |
| dataChunkSize | RegisterType := ( others = > ' 0 ' ) |
| error | RegisterType := ( others = > ' 0 ' ) |
| timeUs | RegisterType := ( others = > ' 0 ' ) |
| peakLatency | RegisterType := ( others = > ' 0 ' ) |
| timeCounter | integer range 0 to ( 1 us/ ClockPeriod ) - 1 := 0 |
| test0 | RegisterType := ( others = > ' 0 ' ) |
| test1 | RegisterType := ( others = > ' 0 ' ) |
| replyState | ReplyStateType := REPLY_STATE_QUEUE_REPLY1 |
| fifo_full | std_logic := ' 0 ' |
| fifo_empty | std_logic := ' 0 ' |
| dataOut | AxisStreamType |
| blockNumber | unsigned ( 63 downto 0 ) := ( others = > ' 0 ' ) |
| memData | std_logic_vector ( 127 downto 0 ) |
| num | integer := 0 |
| numReply | integer := 0 |
| cmdId | unsigned ( 7 downto 0 ) := ( others = > ' 0 ' ) |
| status | unsigned ( 31 downto 0 ) := ( others = > ' 0 ' ) |
| numBlocks | unsigned ( 31 downto 0 ) := ( others = > ' 0 ' ) |
| timeUs | unsigned ( 31 downto 0 ) := ( others = > ' 0 ' ) |
| timeCounter | integer range 0 to 125 := 0 |
Records | |
| BufferType | |
| The output data Input buffer status. | |
| inUse1 | std_logic |
| inUse1 and inUse2 are used to indicate buffer is in use when different | |
| inUse2 | std_logic |
| blockNumber | unsigned ( 31 downto 0 ) |
| The first block number in the buffer. | |
| startTime | unsigned ( 31 downto 0 ) |
| The start time for this buffer transaction. | |
Instantiations | |
| databuffer0 | Ram <Entity Ram> |
| fifo0 | Fifo <Entity Fifo> |
| datafifo0 | datafifo |
The documentation for this class was generated from the following files:
- /src/dune/source/DuneNvme/src/NvmeWrite.vhd
- /src/dune/source/DuneNvme/src/NvmeWriteBasic.vhd
Generated by
1.8.15 
