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Dune NVMe Storage Support
DuneNvme  1.0.2
This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment.
TestData Entity Reference

This module provides a simple test data source for testing the NvmeStorage system. More...

Inheritance diagram for TestData:
DuneNvmeTestOsperoTop DuneNvmeTestTop

Entities

Behavioral  architecture
 

Libraries

ieee 
unisim 
work 

Use Clauses

std_logic_1164 
numeric_std 
vcomponents 
NvmeStoragePkg  Package <NvmeStoragePkg>
NvmeStorageIntPkg  Package <NvmeStorageIntPkg>

Generics

BlockSize  integer := NvmeStorageBlockSize
 The block size in Bytes.

Ports

clk   in   std_logic
  The interface clock line.
reset   in   std_logic
  The active high reset line.
enable   in   std_logic
  Enable production of data. Clears to reset state when set to 0.
dataOut   out   AxisDataStreamType
  Output data stream.
dataOutReady   in   std_logic
  Ready signal for output data stream.

Detailed Description

This module provides a simple test data source for testing the NvmeStorage system.

Author
Terry Barnaby (terry.nosp@m..bar.nosp@m.naby@.nosp@m.beam.nosp@m..ltd..nosp@m.uk)
Date
2020-05-12
Version
1.0.0

This module provides a sequence of 32bit incrementing values over a <n> bit wide AXI4 stream (multiple of 32 bits). It sets the AXI4 streams last signal in the last word transfer of a configurable BlockSize block of data. the enable signal enables its operation and when set to 0 clears its state back to intial reset state.


The documentation for this class was generated from the following file:
  • /src/dune/source/DuneNvme/src/TestData.vhd