Logo
Dune NVMe Storage Support
DuneNvme  1.0.2
This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment.
StreamSwitch Entity Reference

This module implements a PCIe packet switch transfering packets between streams. More...

Inheritance diagram for StreamSwitch:
NvmeStorageUnit NvmeStorage DuneNvmeTestOsperoTop DuneNvmeTestTop

Libraries

ieee 
unisim 
work 

Use Clauses

std_logic_1164 
numeric_std 
vcomponents 
NvmeStoragePkg  Package <NvmeStoragePkg>
NvmeStorageIntPkg  Package <NvmeStorageIntPkg>

Generics

NumStreams  integer := 8
 The number of streams.

Ports

clk   in   std_logic
  The interface clock line.
reset   in   std_logic
  The active high reset line.
streamIn   inout   AxisStreamArrayType ( 0 to NumStreams - 1 ) := ( others = > AxisStreamInput )
  Input streams.
streamOut   inout   AxisStreamArrayType ( 0 to NumStreams - 1 ) := ( others = > AxisStreamOutput )
  Output streams.

Detailed Description

This module implements a PCIe packet switch transfering packets between streams.

Author
Terry Barnaby (terry.nosp@m..bar.nosp@m.naby@.nosp@m.beam.nosp@m..ltd..nosp@m.uk)
Date
2020-04-08
Version
1.0.0

This switch sends PCIe packets between streams. There are two AXI streams per logical stream one is for input packets and one for output packets. Streams are numbered 0 to NumStreams-1. It expects Xilinx PCIe Gen3 PCIe packet headers to be used. Packets are switched based on the address fields bits 27 downto 24 in the case of request packets and on the requesterId field in the case of replies. A special bit, 29, is set in the reply header to indicate that the packet is a reply type. The switch uses a priority based on the input stream number, with 0 being the highest priority. When the switch sees a valid signal on one of the streams and its desitation stream is ready then the switch will send a complete packet, using the "last" signal to denote the end of packet. Note this simple implementation can only send one packet at a time. This simple switch only allows one packet to be transfered at a time and uses unregistered outputs to reduce latency.


The documentation for this class was generated from the following file:
  • /src/dune/source/DuneNvme/src/StreamSwitch.vhd