Ram Entity Reference

This module provides a simple dual ported RAM module that will be implemented in blockram if large enough. More...

Inheritance diagram for Ram:

Entities
Behavioral	architecture

Libraries
ieee
unisim
work

Use Clauses
std_logic_1164
numeric_std
vcomponents
NvmeStoragePkg	Package <NvmeStoragePkg>
NvmeStorageIntPkg	Package <NvmeStorageIntPkg>

Generics
DataWidth	integer := 128
	The data width of the RAM in bits.
Size	integer := 4096
	The size in RAM locations.
AddressWidth	integer := 13
RegisterOutputs	boolean := False
	Register the outputs.

Ports
clk	in	std_logic
		The interface clock line.
reset	in	std_logic
		The active high reset line.
writeEnable	in	std_logic
writeAddress	in	unsigned ( AddressWidth- 1 downto 0 )
writeData	in	std_logic_vector ( DataWidth - 1 downto 0 )
readEnable	in	std_logic
readAddress	in	unsigned ( AddressWidth- 1 downto 0 )
readData	out	std_logic_vector ( DataWidth - 1 downto 0 )

Detailed Description

This module provides a simple dual ported RAM module that will be implemented in blockram if large enough.

Author

Terry Barnaby (terry.nosp@m..bar.nosp@m.naby@.nosp@m.beam.nosp@m..ltd..nosp@m.uk)

Date

2020-05-09

Version

1.0.0

This is a simple single clock dual ported RAM element written so that blockram can be easily infered by synthesis tools. The data width and size of the RAM are configurable parameters. Writes to memory happen in 1 clock cycle when the writeEnable signal is high. Reads from memory take two clock cycles. One to latch the read address and one for the readData to become available. There is a RegisterOutputs option on the readData output that will use the block RAM's internal data register for better system timing. This will add an additional 1 cycle latency on memory reads.

Copyright

2020 Beam Ltd, Apache License, Version 2.0 Copyright 2020 Beam Ltd Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.

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The documentation for this class was generated from the following file:

• /src/dune/source/DuneNvme/src/Ram.vhd