DuneNvme 1.0.2 This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment. |
This module performs the Nvme read data functionality. More...
![](classNvmeRead.png)
Entities | |
Behavioral | architecture |
Libraries | |
ieee | |
unisim | |
work |
Use Clauses | |
std_logic_1164 | |
numeric_std | |
vcomponents | |
NvmeStoragePkg | Package <NvmeStoragePkg> |
NvmeStorageIntPkg | Package <NvmeStorageIntPkg> |
Generics | |
Simulate | boolean := False |
Generate simulation core. | |
BlockSize | integer := NvmeStorageBlockSize |
System block size. | |
NvmeBlockSize | integer := 512 |
The NVMe's formatted block size. | |
NvmeTotalBlocks | integer := 134217728 |
The total number of 4k blocks available. |
Ports | ||
clk | in | std_logic |
The interface clock line. | ||
reset | in | std_logic |
The active high reset line. | ||
enable | in | std_logic |
Enable operation, used to limit bandwidth used. | ||
requestOut | inout | AxisStreamType := AxisStreamOutput |
To Nvme request stream. | ||
replyIn | inout | AxisStreamType := AxisStreamInput |
from Nvme reply stream | ||
memReqIn | inout | AxisStreamType := AxisStreamInput |
From Nvme request stream (4) | ||
memReplyOut | inout | AxisStreamType := AxisStreamOutput |
To Nvme reply stream. | ||
regWrite | in | std_logic |
Enable write to register. | ||
regAddress | in | unsigned ( 3 downto 0 ) |
Register to read/write. | ||
regDataIn | in | std_logic_vector ( 31 downto 0 ) |
Register write data. | ||
regDataOut | out | std_logic_vector ( 31 downto 0 ) |
Register contents. |
Detailed Description
This module performs the Nvme read data functionality.
- Date
- 2020-08-10
- Version
- 1.0.1
This is a simple module that provides a set of host accessible registers that can be used to read data from the Nvme device. It requires the NvmeBlockSize and NvmeTotalBlocks parameters to be set for the Nvme device in use. To use the host sets the starting 4k block number to read, the number of blocks to read and then sets the enable bit is set in the control register. the NvmeRead module will then start sending NVme block read requests to the Nvme device. These requests have the Pcie read data address set to 0x01FXXXXX with XXXXX set to the byte address of the block. The Nvme will send Pcie write requests to this address and hence the host will receive a set of Pcie write request packets with the address 0x01FXXXXX. These packets will contain the block data and be sized to the Pcie max payload size.
- Copyright
- 2020 Beam Ltd, Apache License, Version 2.0 Copyright 2020 Beam Ltd Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. You may obtain a copy of the License at http://www.apache.org/licenses/LICENSE-2.0 Unless required by applicable law or agreed to in writing, software distributed under the License is distributed on an "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. See the License for the specific language governing permissions and limitations under the License.
The documentation for this class was generated from the following file:
- /src/dune/source/DuneNvme/src/NvmeRead.vhd
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