| DuneNvme 1.0.2 This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment. |
Behavioral Architecture Reference
Processes | |
| PROCESS_2 | ( clk2 ) |
Constants | |
| TCQ | time := 1 ns |
Signals | |
| sendCdcReg1 | std_logic := ' 0 ' |
| sendCdcReg2 | std_logic := ' 0 ' |
Attributes | |
| keep | string |
| async_reg | string |
| keep | sendCdcReg1 : signal is " true " |
| keep | sendCdcReg2 : signal is " true " |
| async_reg | sendCdcReg1 : signal is " true " |
| async_reg | sendCdcReg2 : signal is " true " |
The documentation for this class was generated from the following file:
- /src/dune/source/DuneNvme/src/Cdc.vhd
Generated by
1.8.15