Features

Network connected FFT processing system.

Host system based on the Linux operating system for reliability
and flexibility.

Realtime data capture and processing.

FPGA based reconfigurable hardware based on the Xilinx VertexE
series chips for fast and flexible signal processing.

Parallel FFT, power and integration algorithms in hardware.

Multiple processing engines per system.

Processing engines can be interconnected with high speed
connections.

Alternative data processing algorithms can be developed and
downloaded to the processing engines.

GUI control application for configuration and control.

Remote control by remote software.

Data stored on local disk accessible via NFS, SMB, FTP or
HTTP network protocols.

Specifications

Input signal: 2V pp into 50 ohm on each channel.

Input Clock: 50 MHz digital clock input into 100 ohm.

Internal 50MHz digital clock.

Clock source selection with programmable divider.

Antialiasing filters on each channel: 6 pole elliptic filter,
1 KHz to 23 MHz +1 dB.

Two 50MHz 14 bit analogue to digital samplers per processing
engine.

FFT Algorithm: 4096 point, 14 bit with adaptive scaling
in 82 micro seconds.

Spectrum power Integrator: operates in parallel with the
FFT
algorithm, 64 bit depth.

Further integration on the host using 64 bit floating point
arithmetic.

10/100 baseT Ethernet network interface.

Standard algorithms: analogue data capture, FFT processing,
quadrature FFT processing.
