AstroFFT: Astronomical Digital Spectrometer

The system processes, in real time,  multiple wide bandwidth analogue signals from a radio telescope. The system employs the Fast Fourier Transform (FFT) to calculate the spectrum of the signals and integrates the power of this spectrum over time.

The AstroFFT system consists of a network accessible host containing multiple FFT processing engines. Each processing engine has two, fast, analogue to digital converters connected directly to one of the latest generation of Field Programmable Gate Arrays (FPGA's). The FFT, power and integration calculations are performed by this FPGA. This novel architecture provides the high level of performance required with the flexibility to modify or use different processing algorithms.

• Network connected FFT processing system.
• Host system based on the Linux operating system for reliability and flexibility.
• Real-time data capture and processing.
• FPGA based re-configurable hardware based on the Xilinx Vertex-E series chips for fast and flexible signal processing.
• Parallel FFT, power and integration algorithms in hardware.
• Multiple processing engines per system.
• Processing engines can be interconnected with high speed connections.
• Alternative data processing algorithms can be developed and downloaded to the processing engines.
• GUI control application for configuration and control.
• Remote control by remote software.
• Data stored on local disk accessible via NFS, SMB, FTP or HTTP network protocols.

• Input signal: 2V p-p  into 50 ohm on each channel.
• Input Clock:  50 MHz digital clock input into 100 ohm.
• Internal 50MHz digital clock.
• Clock source selection with programmable divider.
• Anti-aliasing filters on each channel: 6 pole elliptic filter, 1 KHz to 23 MHz +-1 dB.
• Two 50MHz 14 bit analogue to digital samplers per processing engine.
• FFT Algorithm: 4096 point, 14 bit with adaptive scaling  in 82 micro seconds.
• Spectrum power Integrator: operates in parallel with the FFT algorithm, 64 bit depth.
• Further integration on the host using 64 bit floating point arithmetic.
• 10/100 baseT Ethernet network interface.
• Standard algorithms: analogue data capture, FFT processing, quadrature FFT processing.