AxisStream clock domain crossing module.
- Author
- Terry Barnaby (terry.nosp@m..bar.nosp@m.naby@.nosp@m.beam.nosp@m..ltd..nosp@m.uk)
- Date
- 2020-03-28
- Version
- 1.0.0
This module implements a clock crossing for an AXI4 stream encoded using the AxisStream record type. It uses the Xilinx AXI4 stream CDC IP to implement this. The Simulate parameter reduces the functionality to a simple pass through for simple system simulations.
- Copyright
- GNU GPL License Copyright (c) Beam Ltd, All rights reserved.
This code is free software: you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation, either version 3 of the License, or (at your option) any later version. This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with this code. If not, see https://www.gnu.org/licenses/.