DuneNvme
1.0.0
This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment.
test
bfpga_driver
bfpga.h
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/*******************************************************************************
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* BFpga.h BFpga FPGA device driver definititions
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* T.Barnaby, BEAM Ltd, 2020-03-05
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*******************************************************************************
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*
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* Copyright (c) 2020 BEAM Ltd. All rights reserved.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* OpenIB.org BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef _BFPGA_H
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#define _BFPGA_H
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#define BFPGA_CMD_GETINFO _IOR('Z', 0, BFpgaInfo)
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#define BFPGA_CMD_GET_CONTROL _IOR('Z', 1, uint32_t)
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#define BFPGA_CMD_SET_CONTROL _IOW('Z', 2, uint32_t)
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#define BFPGA_CMD_RESET _IO('Z', 3)
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typedef
struct
{
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uint64_t physAddress;
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uint64_t length;
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}
BFpgaMem
;
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typedef
struct
{
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BFpgaMem
regs;
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BFpgaMem
dmaRegs;
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BFpgaMem
dmaChannels[8];
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}
BFpgaInfo
;
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// FPGA DDC Control Registers
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const
int
BFpgaId = 0x0000;
// Firmware ID
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const
int
BFpgaControl = 0x0001;
// Control
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const
int
BFpgaStatus = 0x0002;
// Status
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const
int
BFpgaIntControl = 0x0003;
// Interrupt Enables
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const
int
BFpgaIntStatus = 0x0004;
// Interrupt Status
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#endif
BFpgaMem
Definition:
bfpga.h:44
BFpgaInfo
Definition:
bfpga.h:49
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