DuneNvme  1.0.0
This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment.
Constants | Subtypes | Types | Signals | Functions | Processes
Behavioral Architecture Reference

Functions

std_logic_vector   setHeader (
request: in integer
address: in integer
count: in integer
tag: in integer
)
 Set the fields in the PCIe TLP header.
std_logic_vector   pcieAddress ( blocknum: in unsigned )

Processes

PROCESS_6  ( clk )
PROCESS_7  ( clk )
 Need to wait here.
PROCESS_8  ( clk )

Constants

TCQ  time := 1 ns
NvmeBlocks  integer := BlockSize / NvmeBlockSize
 The number of Nvme blocks per NvmeStorage system block.

Types

StateType ( STATE_IDLE , STATE_INIT , STATE_RUN , STATE_COMPLETE , STATE_QUEUE_HEAD , STATE_QUEUE_0 , STATE_QUEUE_1 , STATE_QUEUE_2 , STATE_QUEUE_3 , STATE_WAIT_REPLY )
ReplyStateType ( REPSTATE_IDLE , REPSTATE_INIT , REPSTATE_COMPLETE , REPSTATE_QUEUE_REPLY1 , REPSTATE_QUEUE_REPLY2 )

Subtypes

RegisterType  unsigned ( 31 downto 0 )

Signals

state  StateType := STATE_IDLE
replyState  ReplyStateType := REPSTATE_QUEUE_REPLY1
nvmeReplyHead  NvmeReplyHeadType
control  RegisterType := ( others = > ' 0 ' )
 Control register.
status  RegisterType := ( others = > ' 0 ' )
 Status register.
dataStart  RegisterType := ( others = > ' 0 ' )
 The data chunk start position in blocks.
dataSize  RegisterType := ( others = > ' 0 ' )
 The data chunk size in blocks.
error  RegisterType := ( others = > ' 0 ' )
 The system errors status.
enabled  std_logic := ' 0 '
 Read is enabled.
complete  std_logic := ' 0 '
 Read is complete.
numBlocksProc  unsigned ( 31 downto 0 ) := ( others = > ' 0 ' )
 Number of block write requests sent.
numBlocksDone  unsigned ( 31 downto 0 ) := ( others = > ' 0 ' )
 Number of block write completions received.

The documentation for this class was generated from the following file: