DuneNvme  1.0.0
This is a simple NVMe test environment that allows experimentation with the low level PCIe NVMe interfaces as available on a Xilinx FPGA environment.
Constants | Types | Signals | Processes
Behavioral Architecture Reference

Processes

PROCESS_3  ( clk )

Constants

TCQ  time := 1 ns

Types

MemoryType ( 0 to Size - 1 ) std_logic_vector ( DataWidth - 1 downto 0 )

Signals

memory  MemoryType := ( others = > ( others = > ' U ' ) )
count  integer range 0 to Size
 Count of number of FIFO items.
writePos  integer range 0 to Size - 1
 The write position pointer.
readPos  integer range 0 to Size - 1
 The read position pointer.
posLooped  boolean := False
 The write pointer has looped around behind the read pointer.
writeReady  std_logic
 There is space to write to the FIFO.
writeEnable  std_logic
 Write data to the FIFO.
readReady  std_logic
 There is space to write to the FIFO.
readEnable  std_logic
 Read data from the FIFO.

The documentation for this class was generated from the following file: