Cern

TMS Notes


Notes on the TMS implementation at 2007-11-05.

Hardware

  1. The racks switching power suppy and controller module do create some noise that is seen on the ADC inputs. We have reduced this by placing the PUPE boards away from of these compenents into the center slots of the rack. Possible further improvements include: Using aluminium screening panels in the two vacent slots, Putting a patch over the capacitor holes in the power supply case, moving the power supply to a position next to the controller module.
  2. The controller module alternates between using low power (50W) and then using high power (100W) for a time. We suspect this is the second processor being used, but we have not investigated this.
  3. The digital inputs are 50 ohm terminated. The termination resistance could be increased to 75 or 100 ohm's.
  4. The FPGA tempreture sensor can sometimes, depending on the FPGA bit file in use, return inaccurate results. Removing C833 fixes this issue.

Software

  1. A data cache could be impelemented in the TMS Server to improve data bandwidth when more than one client requires the same data.

General

  1. The TMS system processes a huge amount of data, around 15 billion samples per second. The cPCI, internal and external network bandwidth's limit the amount of data than can be read. It would be possible to use the Dual Gigabit Ethernet ports on the PUPE cards and install multiple Gigabit Ethernet cards in the TMS server to improve the bandwidth available.