Account
| CUSTOM_LIBERA Project Status | |||
| Project File: | Custom_Libera.ise | Current State: | Synthesized |
| Module Name: | pll3 |
| No Errors |
| Target Device: | xc2vp30-6ff1152 |
| 40 Warnings |
| Product Version: | ISE, 8.1i |
| Pn 9. pa? 18:11:29 2006 |
| Device Utilization Summary (estimated values) | |||
| Logic Utilization | Used | Available | Utilization |
| Number of Slices | 493 | 13696 | 3% |
| Number of Slice Flip Flops | 716 | 27392 | 2% |
| Number of 4 input LUTs | 830 | 27392 | 3% |
| Number of bonded IOBs | 193 | 644 | 29% |
| Number of BRAMs | 1 | 136 | 0% |
| Number of GCLKs | 1 | 16 | 6% |
| Detailed Reports | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos |
| Synthesis Report | Current | Pn 9. pa? 18:11:28 2006 | 0 | 40 Warnings | 0 |
| Translation Report | |||||
| Map Report | |||||
| Place and Route Report | |||||
| Static Timing Report | |||||
| Bitgen Report | |||||