#
# Location constraints
#
# Clock Section
NET "clk125_npad_i" LOC = "AK17" | IOSTANDARD = LVPECL_25 ;
NET "clk125_ppad_i" LOC = "AL17" | IOSTANDARD = LVPECL_25 ;
NET "adc_clk_ppad_i" LOC = "M32" | IOSTANDARD = LVPECL_25 ;
NET "adc_clk_npad_i" LOC = "M31" | IOSTANDARD = LVPECL_25 ;
NET "vcxo" LOC = "M34";
#NET "vcx00_pad_o" LOC = "V33"
NET "sys_clk106_en_pad_o" LOC=AK16 | IOSTANDARD=LVCMOS33 ;
NET "sys_clk125_en_pad_o" LOC=AJ16  | IOSTANDARD=LVCMOS33 ;
#### ARM TRIGGER
NET "PostMortem_P_PAD" LOC = "AA10" | IOSTANDARD = LVPECL_25 ;
NET "PostMortem_N_PAD" LOC = "AA9" | IOSTANDARD = LVPECL_25 ;
#### TRIGGER    TRIGGER
NET "TRIGGER_N_PAD" LOC = "G9" | IOSTANDARD = LVPECL_25 ;
NET "TRIGGER_P_PAD" LOC = "H9" | IOSTANDARD = LVPECL_25 ;
# SBC Section
NET "sbc_rst_pad_o" LOC = "AC4";
NET "sbc_irq_pad_o" LOC = "AL6"  | IOSTANDARD=LVCMOS33 ;
NET "sbc_csn_pad_i" LOC = "AL30" | IOSTANDARD=LVCMOS33 ;
NET "sbc_wrn_pad_i" LOC = "AL29" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<2>"  LOC = "AJ13" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<3>"  LOC = "AK13" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<4>"  LOC = "AL11" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<5>"  LOC = "AE15" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<6>"  LOC = "AF15" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<7>"  LOC = "AG14" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<8>"  LOC = "AH14" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<9>"  LOC = "AL13" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<10>"  LOC = "AL12" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<11>"  LOC = "AD16" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<12>"  LOC = "AE16" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<13>"  LOC = "AG18" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<14>"  LOC = "AF18" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<15>"  LOC = "AK19" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<16>"  LOC = "AJ19" | IOSTANDARD=LVCMOS33 ;
NET "sbc_adr_pad_i<17>"  LOC = "AH19"  | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<0>" LOC = "AG9" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<1>" LOC = "AH9" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<2>" LOC = "AK6" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<3>" LOC = "AK7" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<4>" LOC = "AK28" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<5>" LOC = "AK29" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<6>" LOC = "AH26" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<7>" LOC = "AG26" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<8>" LOC = "AE22" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<9>" LOC = "AF22" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<10>" LOC = "AG22" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<11>" LOC = "AH22" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<12>" LOC = "AJ24" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<13>" LOC = "AK24" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<14>" LOC = "AE21" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<15>" LOC = "AF21" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<16>" LOC = "AJ22" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<17>" LOC = "AK22" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<18>" LOC = "AL24" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<19>" LOC = "AM24" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<20>" LOC = "AE20" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<21>" LOC = "AF20" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<22>" LOC = "AG21" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<23>" LOC = "AL23" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<24>" LOC = "AL22" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<25>" LOC = "AE19" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<26>" LOC = "AD19" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<27>" LOC = "AM22" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<28>" LOC = "AM21" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<29>" LOC = "AH21" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<30>" LOC = "AF19" | IOSTANDARD=LVCMOS33 ;
NET "sbc_dat_pad_io<31>" LOC = "AG19" | IOSTANDARD=LVCMOS33 ;
#NET "sbc_dat_pad_io*" IOSTANDARD=LVCMOS33
# Triggers section
NET "lemo_mclk_ppad_i" LOC = "E17" | IOSTANDARD=LVPECL_25;
NET "lemo_mclk_npad_i" LOC = "D17" | IOSTANDARD=LVPECL_25;
NET "lemo_sclk_npad_i" LOC = "AB5" | IOSTANDARD=LVPECL_25 ;
NET "lemo_sclk_ppad_i" LOC = "AB6" | IOSTANDARD=LVPECL_25;
#NET "lemo_pm_ppad_i" LOC = "AA10" | IOSTANDARD=LVPECL_25
#NET "lemo_pm_npad_i" LOC = "AA9"  | IOSTANDARD=LVPECL_25
#
#NET "lemo_trig_npad_i" LOC = "G9" | IOSTANDARD=LVPECL_25
#NET "lemo_trig_ppad_i" LOC = "H9" | IOSTANDARD=LVPECL_25
#
#NET "lemo_il_pad_o" LOC = "G10" | IOSTANDARD=LVPECL_25
# LED Section
NET "fp_led_pad_o" LOC = "K27";
NET "bp_led0_pad_o" LOC = "K28";
NET "bp_led1_pad_o" LOC = "H31";
NET "bp_led2_pad_o" LOC = "H32";
# SPI Section
NET "ADC_RESET_o" LOC = "P28";
#NET "status_pad_i" LOC = "T25"
NET "spi_func_pad_o" LOC = "T26";
NET "spi_clk_pad_o" LOC = "N32";
NET "spi_data_pad_o" LOC = "P32";
NET "spi_cs_ckm_pad_o" LOC = "N33"; #CS CLK  - clock management chip select
NET "spi_cs_adc1_pad_o" LOC = "P34";
NET "spi_cs_adc2_pad_o" LOC = "P33";
NET "spi_cs_adc3_pad_o" LOC = "R34";
NET "spi_cs_adc4_pad_o" LOC = "N31";
#NET "spi_data_pad_i" LOC = "P31"
#ADC Clock Inputs
NET "ADC_CLK_A_i" LOC = "J27" | IOSTANDARD=LVCMOS25 ;
NET "ADC_CLK_B_i" LOC = "L27" | IOSTANDARD=LVCMOS25 ;
NET "ADC_CLK_C_i" LOC = "R33" | IOSTANDARD=LVCMOS25 ;
NET "ADC_CLK_D_i" LOC = "T33" | IOSTANDARD=LVCMOS25 ;
# ADC Section
NET "adc_a_dat_pad_i<13>"  LOC = "K30" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<12>"  LOC = "M28" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<11>"  LOC = "R26" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<10>"  LOC = "L30" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<9>"  LOC = "L28" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<8>"  LOC = "J32" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<7>"  LOC = "R25" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<6>"  LOC = "G29" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<5>"  LOC = "G30" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<4>"  LOC = "G32" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<3>"  LOC = "F30" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<2>"  LOC = "H34" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<1>"  LOC = "F31" | IOSTANDARD=LVCMOS25 ;
NET "adc_a_dat_pad_i<0>"  LOC = "J28" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<13>"  LOC = "M25" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<12>"  LOC = "N30" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<11>"  LOC = "N29" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<10>"  LOC = "K31" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<9>"  LOC = "G31" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<8>"  LOC = "J31" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<7>"  LOC = "K33" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<6>"  LOC = "L25" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<5>"  LOC = "J33" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<4>"  LOC = "L32" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<3>"  LOC = "M29" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<2>"  LOC = "V33" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<1>"  LOC = "L31" | IOSTANDARD=LVCMOS25 ;
NET "adc_b_dat_pad_i<0>"  LOC = "L29" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<13>"  LOC = "R28" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<12>"  LOC = "T24" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<11>"  LOC = "P27" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<10>"  LOC = "P29" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<9>"  LOC = "P30" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<8>"  LOC = "U27" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<7>"  LOC = "U24" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<6>"  LOC = "U28" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<5>"  LOC = "U30" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<4>"  LOC = "N26" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<3>"  LOC = "R32" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<2>"  LOC = "N27" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<1>"  LOC = "N28" | IOSTANDARD=LVCMOS25 ;
NET "adc_c_dat_pad_i<0>"  LOC = "R29" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<13>"  LOC = "T29" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<12>"  LOC = "U29" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<11>"  LOC = "U26" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<10>"  LOC = "U25" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<9>"  LOC = "N34" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<8>"  LOC = "U31" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<7>"  LOC = "U32" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<6>"  LOC = "T27" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<5>"  LOC = "T28" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<4>"  LOC = "P25" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<3>"  LOC = "N25" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<2>"  LOC = "T31" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<1>"  LOC = "T32" | IOSTANDARD=LVCMOS25 ;
NET "adc_d_dat_pad_i<0>"  LOC = "R31" | IOSTANDARD=LVCMOS25 ;
#NET "adc*" IOSTANDARD=LVCMOS25
# SDRAM Section
NET "ddr2high_data_pad_io*"    IOSTANDARD = SSTL18_II;
NET "ddr2high_udqs_pad_io"    IOSTANDARD = SSTL18_II;
NET "ddr2high_udqsn_pad_io"    IOSTANDARD = SSTL18_II;
NET "ddr2high_ldqs_pad_io"    IOSTANDARD = SSTL18_II;
NET "ddr2high_ldqsn_pad_io"    IOSTANDARD = SSTL18_II;
NET "ddr2low_data_pad_io*"    IOSTANDARD = SSTL18_II;
NET "ddr2low_udqs_pad_io"    IOSTANDARD = SSTL18_II;
NET "ddr2low_udqsn_pad_io"    IOSTANDARD = SSTL18_II;
NET "ddr2low_ldqs_pad_io"    IOSTANDARD = SSTL18_II;
NET "ddr2low_ldqsn_pad_io"    IOSTANDARD = SSTL18_II;
NET "ddr2high_bank_pad_o<0>" LOC = "T7";
NET "ddr2high_bank_pad_o<1>" LOC = "N3";
NET "ddr2low_bank_pad_o<0>" LOC = "G3";
NET "ddr2low_bank_pad_o<1>" LOC = "G1";
NET "ddr2high_casn_pad_o" LOC = "T8";
NET "ddr2high_rasn_pad_o" LOC = "N2";
NET "ddr2high_cke_pad_o" LOC = "T10";
NET "ddr2high_clk_pad_o" LOC = "R10";
NET "ddr2high_clkn_pad_o" LOC = "R9";
NET "ddr2high_wen_pad_o" LOC = "T6";
NET "ddr2low_casn_pad_o" LOC = "M10";
NET "ddr2low_cke_pad_o" LOC = "H2";
NET "ddr2low_clk_pad_o" LOC = "H5";
NET "ddr2low_clkn_pad_o" LOC = "H6";
NET "ddr2low_rasn_pad_o" LOC = "K8";
NET "ddr2low_wen_pad_o" LOC = "H1";
NET "ddr2high_ldm_pad_o" LOC = "R3";
NET "ddr2high_udm_pad_o" LOC = "N7";
NET "ddr2high_ldqs_pad_io" LOC = "P9";
NET "ddr2high_ldqsn_pad_io" LOC = "P10";
NET "ddr2high_udqs_pad_io" LOC = "U4";
NET "ddr2high_udqsn_pad_io" LOC = "U5";
NET "ddr2high_odt_pad_o" LOC = "P8";
NET "ddr2high_csn_pad_o" LOC = "M7";
NET "ddr2low_ldm_pad_o" LOC = "N1";
NET "ddr2low_udm_pad_o" LOC = "L3";
NET "ddr2low_ldqs_pad_io" LOC = "N10";
NET "ddr2low_ldqsn_pad_io" LOC = "L10";
NET "ddr2low_udqs_pad_io" LOC = "H4";
NET "ddr2low_udqsn_pad_io" LOC = "N6";
NET "ddr2low_odt_pad_o" LOC = "J7";
NET "ddr2high_addr_pad_o<0>" LOC = "P7";
NET "ddr2high_addr_pad_o<1>" LOC = "P1";
NET "ddr2high_addr_pad_o<2>" LOC = "R6";
NET "ddr2high_addr_pad_o<3>" LOC = "P5";
NET "ddr2high_addr_pad_o<4>" LOC = "U11";
NET "ddr2high_addr_pad_o<5>" LOC = "T9";
NET "ddr2high_addr_pad_o<6>" LOC = "L9";
NET "ddr2high_addr_pad_o<7>" LOC = "U8";
NET "ddr2high_addr_pad_o<8>" LOC = "N9";
NET "ddr2high_addr_pad_o<9>" LOC = "U9";
NET "ddr2high_addr_pad_o<10>" LOC = "R7";
NET "ddr2high_addr_pad_o<11>" LOC = "N8";
NET "ddr2high_addr_pad_o<12>" LOC = "P6";
NET "ddr2low_addr_pad_o<0>" LOC = "F8";
NET "ddr2low_addr_pad_o<1>" LOC = "F2";
NET "ddr2low_addr_pad_o<2>" LOC = "F7";
NET "ddr2low_addr_pad_o<3>" LOC = "F1";
NET "ddr2low_addr_pad_o<4>" LOC = "L4";
NET "ddr2low_addr_pad_o<5>" LOC = "E3";
NET "ddr2low_addr_pad_o<6>" LOC = "G4";
NET "ddr2low_addr_pad_o<7>" LOC = "E1";
NET "ddr2low_addr_pad_o<8>" LOC = "L5";
NET "ddr2low_addr_pad_o<9>" LOC = "F5";
NET "ddr2low_addr_pad_o<10>" LOC = "F4";
NET "ddr2low_addr_pad_o<11>" LOC = "J6";
NET "ddr2low_addr_pad_o<12>" LOC = "E4";
NET "ddr2high_data_pad_io<0>" LOC = "M4";
NET "ddr2high_data_pad_io<1>" LOC = "P3";
NET "ddr2high_data_pad_io<2>" LOC = "M6";
NET "ddr2high_data_pad_io<3>" LOC = "P2";
NET "ddr2high_data_pad_io<4>" LOC = "U6";
NET "ddr2high_data_pad_io<5>" LOC = "U10";
NET "ddr2high_data_pad_io<6>" LOC = "R1";
NET "ddr2high_data_pad_io<7>" LOC = "N5";
NET "ddr2high_data_pad_io<8>" LOC = "T4";
NET "ddr2high_data_pad_io<9>" LOC = "U3";
NET "ddr2high_data_pad_io<10>" LOC = "N4";
NET "ddr2high_data_pad_io<11>" LOC = "T2";
NET "ddr2high_data_pad_io<12>" LOC = "T3";
NET "ddr2high_data_pad_io<13>" LOC = "R4";
NET "ddr2high_data_pad_io<14>" LOC = "V2";
NET "ddr2high_data_pad_io<15>" LOC = "T5";
NET "ddr2low_data_pad_io<0>" LOC = "J8";
NET "ddr2low_data_pad_io<1>" LOC = "H3";
NET "ddr2low_data_pad_io<2>" LOC = "L6";
NET "ddr2low_data_pad_io<3>" LOC = "J5";
NET "ddr2low_data_pad_io<4>" LOC = "J3";
NET "ddr2low_data_pad_io<5>" LOC = "G5";
NET "ddr2low_data_pad_io<6>" LOC = "K1";
NET "ddr2low_data_pad_io<7>" LOC = "L7";
NET "ddr2low_data_pad_io<8>" LOC = "L8";
NET "ddr2low_data_pad_io<9>" LOC = "K4";
NET "ddr2low_data_pad_io<10>" LOC = "K7";
NET "ddr2low_data_pad_io<11>" LOC = "M3";
NET "ddr2low_data_pad_io<12>" LOC = "K2";
NET "ddr2low_data_pad_io<13>" LOC = "M9";
NET "ddr2low_data_pad_io<14>" LOC = "L1";
NET "ddr2low_data_pad_io<15>" LOC = "M2";
#NET "ddr2_clk90" PERIOD=6 ns HIGH 50 %
#NET "ddr2_clk0" PERIOD=6 ns HIGH 50 %
#PMC
NET "DIR<0>" LOC = "V6";
NET "DIO<4>" LOC = "W9";
NET "DIO<3>" LOC = "AK1";
NET "DIO<2>" LOC = "AJ1";
NET "DIO<1>" LOC = "AB4";
NET "DIR<1>" LOC = "Y2";
NET "DIO<8>" LOC = "AG7";
NET "DIO<7>" LOC = "AB3";
NET "DIO<6>" LOC = "AG5";
NET "DIO<5>" LOC = "AF8";
NET "DIR<2>" LOC = "W4";
NET "DIO<12>" LOC = "AK3";
NET "DIO<11>" LOC = "W10";
NET "DIO<10>" LOC = "AH5";
NET "DIO<9>" LOC = "AL2";
NET "DIR<3>" LOC = "V10";
NET "DIO<16>" LOC = "Y10";
NET "DIO<15>" LOC = "AA5";
NET "DIO<14>" LOC = "AA3";
NET "DIO<13>" LOC = "AA6";
NET "DIR<4>" LOC = "V9";
NET "DIO<20>" LOC = "V7";
NET "DIO<19>" LOC = "AJ5";
NET "DIO<18>" LOC = "AB1";
NET "DIO<17>" LOC = "AA4";
NET "DIR<5>" LOC = "W3";
NET "DIO<24>" LOC = "W2";
NET "DIO<23>" LOC = "Y9";
NET "DIO<22>" LOC = "V3";
NET "DIO<21>" LOC = "AJ7";
#NET "adc_clk_ppad_i" TNM_NET = "adc_clk_ppad_i"
#TIMESPEC "TS_adc_clk_ppad_i" = PERIOD "adc_clk_ppad_i" 6 ns HIGH 50 %
#NET "adc_clk_npad_i" TNM_NET = "adc_clk_npad_i"
#TIMESPEC "TS_adc_clk_npad_i" = PERIOD "adc_clk_npad_i" 6 ns HIGH 50 %
#OFFSET = IN 3 ns BEFORE "adc_clk_npad_i"
#NET "lemo_sclk_npad_i" TNM_NET = "lemo_sclk_npad_i"
#TIMESPEC "TS_lemo_sclk_npad_i" = PERIOD "lemo_sclk_npad_i" 6 ns HIGH 50 %
#NET "lemo_mclk_npad_i" TNM_NET = "lemo_mclk_npad_i"
#TIMESPEC "TS_lemo_mclk_npad_i" = PERIOD "lemo_mclk_npad_i" 6 ns HIGH 50 %
#OFFSET = IN 3 ns BEFORE "adc_clk_ppad_i"
NET "adc_clk_ppad_i" TNM_NET = "adc_clk_ppad_i";
TIMESPEC "TS_adc_clk_ppad_i" = PERIOD "adc_clk_ppad_i" 14 ns HIGH 50 %;  #test version 62.5MHz
NET "adc_clk_npad_i" TNM_NET = "adc_clk_npad_i";
TIMESPEC "TS_adc_clk_npad_i" = PERIOD "adc_clk_npad_i" 14 ns HIGH 50 %;  #test version 62.5MHz
#NET "clk125_ppad_i" TNM_NET = "clk125_ppad_i";
#TIMESPEC "TS_clk125_ppad_i" = PERIOD "clk125_ppad_i" 8 ns HIGH 50 %;