Build system changes for multiple FPGA targets.
authorTerry Barnaby <terry.barnaby@beam.beam.ltd.uk>
Sun, 14 Jun 2020 07:46:32 +0000 (08:46 +0100)
committerTerry Barnaby <terry.barnaby@beam.beam.ltd.uk>
Sun, 14 Jun 2020 07:46:32 +0000 (08:46 +0100)
Build system changes for release.

Makefile
src/DuneNvmeTestOpseroTop.vhd
vivado/Config-template.mk
vivado/Makefile
vivado/Vivado.mk

index 73b51eb3576454b4cc93d912f040511ecb0c3e59..f47fae7dd162b6ee70c96a06307b000ab503954f 100644 (file)
--- a/Makefile
+++ b/Makefile
@@ -15,6 +15,11 @@ all:
        make -C vivado
        make -C test
 
+all_targets:
+       make -C vivado DuneNvmeTest
+       make -C vivado DuneNvmeTestOspero
+       make -C test
+
 install: all
 
 clean:
@@ -28,10 +33,13 @@ distclean: clean
        make -C docsrc distclean
        make -C test distclean
        
-release: all
-       mkdir -p release
-       cp vivado/*.runs/impl_1/*.bit release/${PROJECT}-${VERSION}.bit
-       cp test/test-nvme release/test-nvme-${VERSION}
+#release: docs all
+release:
+       rm -fr /tmp/${PROJECT}-${VERSION}
+       mkdir -p /tmp/${PROJECT}-${VERSION} /tmp/${PROJECT}-${VERSION}/vivado
+       rsync -a --delete --exclude=*.[od] Config.mk license.txt Makefile sim src tools test /tmp/${PROJECT}-${VERSION}
+       rsync -a --delete --exclude=*.[od] vivado/Makefile vivado/Config.mk vivado/Config-template.mk vivado/Vivado.mk vivado/*.xpr vivado/bitfiles /tmp/${PROJECT}-${VERSION}/vivado
+       tar -czf ../../releases/${PROJECT}-${VERSION}.tar.gz -C /tmp ${PROJECT}-${VERSION}
 
 docs:
        make -C docsrc
index 0b9ce3ed67d3fec40cb68df6bb4af0cc3c066974..cfa86136bc5d2f89ce4d68c569bfcc7901d39f9d 100644 (file)
@@ -42,7 +42,7 @@ use unisim.vcomponents.all;
 library work;
 use work.NvmeStoragePkg.all;
 
-entity DuneNvmeTestTop is
+entity DuneNvmeTestOsperoTop is
 generic(
        Simulate        : boolean       := False
 );
@@ -82,7 +82,7 @@ port (
 );
 end;
 
-architecture Behavioral of DuneNvmeTestTop is
+architecture Behavioral of DuneNvmeTestOsperoTop is
 
 component Clk_core is                   
 port (
index 36fbde2543866107a253c1c2459f825aa2df4c64..8b489e29b7e63aceccae9577c9b91c1ee172e899 100644 (file)
@@ -3,6 +3,6 @@
 #                      T.Barnaby,      BEAM Ltd,       2020-05-21
 ################################################################################
 #
-FPGA_TOP       = DuneNvmeTestOsperoTop
-VIVADO_PATH    = /opt/Xilinx/Vivado/2019.2/bin
-VIVADO_TARGET  = ""
+PROJECT                ?= DuneNvmeTestOpsero
+VIVADO_PATH    ?= /opt/Xilinx/Vivado/2019.2/bin
+VIVADO_TARGET  ?= ""
index 24feee0b1f912119fde36c0514fb8443f11b8967..11793f9058202bde70b7470ff2b33e135c233329 100644 (file)
 #  clean:      Remove output files and project files
 #  distclean:  Clean all files
 #
+
 # Project and FPGA settings
-PROJECT        = nvme-test
-BOARD          = xilinx.com:kcu105:part0:1.6
-FPGA_PART      = xcku040-ffva1156-2-e
-FPGA_TOP       ?= DuneNvmeTestTop
+-include Config.mk
+PROJECT        ?= DuneNvmeTest
+BOARD          ?= xilinx.com:kcu105:part0:1.6
+FPGA_PART      ?= xcku040-ffva1156-2-e
+FPGA_TOP       ?= ${PROJECT}Top
 VIVADO_PATH    ?= /opt/Xilinx/Vivado/2019.2/bin
 VIVADO_TARGET  ?= ""
 
--include Config.mk
-
 # Files for synthesis
 SYN_FILES      = ../src/NvmeStoragePkg.vhd ../src/NvmeStorageIntPkg.vhd
 SYN_FILES      += ../src/Ram.vhd ../src/Fifo.vhd ../src/Cdc.vhd
@@ -52,6 +52,12 @@ XDC_FILES    = ../src/${FPGA_TOP}.xdc
 
 include Vivado.mk
 
+all: dirs fpga
+
+all_targets:
+       make PROJECT=DuneNvmeTest
+       make PROJECT=DuneNvmeTestOspero
+
 sync_ip:
        mkdir -p ../src/ip
        cp -a ${PROJECT}.srcs/sources_1/ip/*/*.xci ../src/ip
index c44999a5036d0acfb5fb81b584d30eab05baef24..70f4f6afb38617890352f12d2e971d49206aaa61 100644 (file)
 
 VIVADO_PATH    ?= /opt/Xilinx/Vivado/2019.2/bin
 VIVADO_TARGET  ?= ""
+BITFILE                ?= bitfiles/${PROJECT}.bit
 
 export PATH    := ${VIVADO_PATH}:${PATH}
 
-.PHONY: clean fpga
+.PHONY: clean dirs project fpga
 
 # Prevent make from deleting intermediate files and reports
-.PRECIOUS: ${PROJECT}.xpr ${PROJECT}.bit ${PROJECT}.mcs ${PROJECT}.prm
+.PRECIOUS: ${PROJECT}.xpr ${BITFILE} ${PROJECT}.mcs ${PROJECT}.prm
 .SECONDARY:
 
-all: fpga
+all: dirs fpga
+
+dirs:
+       @mkdir -p bitfiles
 
 project: ${PROJECT}.xpr
 
-fpga: $(PROJECT).bit
+fpga: ${BITFILE}
 
 clean:
-       -rm -rf *.log *.jou *.cache *.hw *.ip_user_files *.runs *.xpr *.html *.xml *.sim *.srcs *.str .Xil defines.v
+       -rm -rf *.log *.jou *.html *.xml
+       -rm -fr ${PROJECT}.cache ${PROJECT}.hw ${PROJECT}.ip_user_files ${PROJECT}.runs ${PROJECT}.sim ${PROJECT}.srcs
        -rm -rf create_project.tcl run_synth.tcl run_impl.tcl generate_bit.tcl
-       -rm -rf *.bit program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl report.tcl
+       -rm -rf program.tcl generate_mcs.tcl *.mcs *.prm flash.tcl report.tcl
        -rm -f utilisation.txt
 
 distclean: clean
-       -rm -rf rev
+       -rm -fr *.cache *.hw *.ip_user_files *.runs *.sim *.srcs .Xil defines.v
+       -rm -rf rev bitfiles
 
 # Vivado project file
 ${PROJECT}.xpr: Makefile Config.mk $(XCI_FILES)
@@ -66,7 +72,7 @@ ${PROJECT}.xpr: Makefile Config.mk $(XCI_FILES)
 
 # Synthesis run
 ${PROJECT}.runs/synth_1/${PROJECT}.dcp: ${PROJECT}.xpr $(SYN_FILES) $(INC_FILES) $(XDC_FILES)
-       rm -f $(PROJECT).bit
+       rm -f ${BITFILE}
        echo "open_project ${PROJECT}.xpr" > run_synth.tcl
        echo "reset_run synth_1" >> run_synth.tcl
        echo "launch_runs synth_1 -jobs 4" >> run_synth.tcl
@@ -81,7 +87,7 @@ ${PROJECT}.runs/synth_1/${PROJECT}.dcp: ${PROJECT}.xpr $(SYN_FILES) $(INC_FILES)
 
 # Implementation run
 ${PROJECT}.runs/impl_1/${PROJECT}_routed.dcp: ${PROJECT}.runs/synth_1/${PROJECT}.dcp
-       rm -f $(PROJECT).bit
+       rm -f ${BITFILE}
        echo "open_project ${PROJECT}.xpr" > run_impl.tcl
        echo "reset_run impl_1" >> run_impl.tcl
        echo "launch_runs impl_1 -jobs 4" >> run_impl.tcl
@@ -98,14 +104,15 @@ ${PROJECT}.runs/impl_1/${PROJECT}_routed.dcp: ${PROJECT}.runs/synth_1/${PROJECT}
        vivado -nojournal -nolog -mode batch -source run_impl.tcl
 
 # Bit file
-${PROJECT}.bit: ${PROJECT}.runs/impl_1/${PROJECT}_routed.dcp
-       rm -f $(PROJECT).bit
+${BITFILE}: ${PROJECT}.runs/impl_1/${PROJECT}_routed.dcp
+       -mkdir -p bitfiles
+       rm -f ${BITFILE}
        echo "open_project ${PROJECT}.xpr" > generate_bit.tcl
        echo "open_run impl_1" >> generate_bit.tcl
        echo "report_utilization -hierarchical -file utilisation.txt" >> generate_bit.tcl
-       echo "write_bitstream -force ${PROJECT}.bit" >> generate_bit.tcl
+       echo "write_bitstream -force ${BITFILE}" >> generate_bit.tcl
        echo "exit" >> generate_bit.tcl
-       time vivado -nojournal -nolog -mode batch -source generate_bit.tcl
+       vivado -nojournal -nolog -mode batch -source generate_bit.tcl
        mkdir -p rev
        EXT=bit; COUNT=100; \
        while [ -e rev/${PROJECT}_rev$$COUNT.$$EXT ]; \
@@ -114,8 +121,8 @@ ${PROJECT}.bit: ${PROJECT}.runs/impl_1/${PROJECT}_routed.dcp
        echo "Output: rev/${PROJECT}_rev$$COUNT.$$EXT";
 
 # Extras for flash etc
-${PROJECT}_primary.mcs ${PROJECT}_secondary.mcs ${PROJECT}_primary.prm ${PROJECT}_secondary.prm: ${PROJECT}.bit
-       echo "write_cfgmem -force -format mcs -size 256 -interface SPIx8 -loadbit {up 0x0000000 $*.bit} -checksum -file $*.mcs" > generate_mcs.tcl
+${PROJECT}_primary.mcs ${PROJECT}_secondary.mcs ${PROJECT}_primary.prm ${PROJECT}_secondary.prm: ${BITFILE}
+       echo "write_cfgmem -force -format mcs -size 256 -interface SPIx8 -loadbit {up 0x0000000 ${BITFILE}} -checksum -file $*.mcs" > generate_mcs.tcl
        echo "exit" >> generate_mcs.tcl
        vivado -nojournal -nolog -mode batch -source generate_mcs.tcl
        mkdir -p rev
@@ -134,13 +141,13 @@ report: ${PROJECT}.runs/impl_1/${PROJECT}_routed.dcp
        echo "exit" >> report.tcl
        vivado -nojournal -nolog -mode batch -source report.tcl
 
-program: $(PROJECT).bit
+program: ${BITFILE}
        echo "open_hw_manager" > program.tcl
        echo "connect_hw_server ${FPGA_TARGET}" >> program.tcl
        echo "open_hw_target" >> program.tcl
        echo "current_hw_device [lindex [get_hw_devices] 0]" >> program.tcl
        echo "refresh_hw_device -update_hw_probes false [current_hw_device]" >> program.tcl
-       echo "set_property PROGRAM.FILE {$(PROJECT).bit} [current_hw_device]" >> program.tcl
+       echo "set_property PROGRAM.FILE {${BITFILE}} [current_hw_device]" >> program.tcl
        echo "program_hw_devices [current_hw_device]" >> program.tcl
        echo "exit" >> program.tcl
        vivado -nojournal -nolog -mode batch -source program.tcl