NvmeWrite: Implemented multiple write buffers. Multiple-write-buffers
authorTerry Barnaby <terry.barnaby@beam.beam.ltd.uk>
Thu, 7 May 2020 12:56:55 +0000 (13:56 +0100)
committerTerry Barnaby <terry.barnaby@beam.beam.ltd.uk>
Thu, 7 May 2020 12:56:55 +0000 (13:56 +0100)
General tidyups.

17 files changed:
docsrc/DuneNvmeStorageManual.odt
source/DuneNvme/sim/testbench/test019-write.sav
source/DuneNvme/sim/testbench/test019-write.vhd
source/DuneNvme/src/DuneNvmeTestTop.vhd
source/DuneNvme/src/DuneNvmeTestTop.xdc
source/DuneNvme/src/NvmeConfig.vhd
source/DuneNvme/src/NvmeQueues.vhd
source/DuneNvme/src/NvmeStorageIntPkg.vhd
source/DuneNvme/src/NvmeStorageUnit.vhd
source/DuneNvme/src/NvmeWrite.vhd
source/DuneNvme/src/TestData.vhd
source/DuneNvme/test/BeamLibBasic.cpp
source/DuneNvme/test/NvmeAccess.cpp
source/DuneNvme/test/NvmeAccess.h
source/DuneNvme/test/bfpga_driver/bfpga.c
source/DuneNvme/test/test_nvme.cpp
source/DuneNvmeTest/doc/Readme.pdf

index 9f3af961bffc73511e70a5c372421e14d8b302da..5f7e62ddcad7edc8e3adfece2929e6d89b021aed 100644 (file)
Binary files a/docsrc/DuneNvmeStorageManual.odt and b/docsrc/DuneNvmeStorageManual.odt differ
index 20535d16dbc73a4c3f68a46b76f3608dfde0a8af..337ba6d96d9b6f458d794e9b859c09b21c78b54e 100644 (file)
@@ -1,38 +1,29 @@
 [*]
 [*] GTKWave Analyzer v3.3.104 (w)1999-2020 BSI
-[*] Wed May  6 09:06:04 2020
+[*] Thu May  7 04:59:52 2020
 [*]
-[dumpfile] "/src/dune/FpgaPlay/test024-nvmewrite/sim/simu/test.ghw"
-[dumpfile_mtime] "Wed May  6 08:52:11 2020"
-[dumpfile_size] 1510744
-[savefile] "/src/dune/FpgaPlay/test024-nvmewrite/sim/testbench/test019-write.sav"
-[timestart] 2897900000
+[dumpfile] "/src/dune/FpgaPlay/test025-nvmewrite/sim/simu/test.ghw"
+[dumpfile_mtime] "Thu May  7 04:59:03 2020"
+[dumpfile_size] 1481327
+[savefile] "/src/dune/FpgaPlay/test025-nvmewrite/sim/testbench/test019-write.sav"
+[timestart] 2615800000
 [size] 1920 1171
 [pos] -1 -1
-*-26.418455 3118900000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
+*-26.418455 2844500000 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
 [treeopen] top.
 [treeopen] top.test.
 [treeopen] top.test.axil.
 [treeopen] top.test.axil.tomaster.
-[treeopen] top.test.hostrecv.
-[treeopen] top.test.hostsend.
-[treeopen] top.test.nvmereq.
 [treeopen] top.test.nvmestorageunit0.
-[treeopen] top.test.nvmestorageunit0.gen03.
-[treeopen] top.test.nvmestorageunit0.gen03.nvmequeues0.
-[treeopen] top.test.nvmestorageunit0.gen03.nvmequeues0.queueinarraypos.
-[treeopen] top.test.nvmestorageunit0.gen03.nvmequeues0.requesthead1.
+[treeopen] top.test.nvmestorageunit0.axil1in.
 [treeopen] top.test.nvmestorageunit0.gen03.nvmewrite0.
-[treeopen] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers.
 [treeopen] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers.[0].
 [treeopen] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers.[1].
-[treeopen] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.
 [treeopen] top.test.nvmestorageunit0.gen03.nvmewrite0.datain.
 [treeopen] top.test.nvmestorageunit0.gen03.streamswitch0.streamin.
 [treeopen] top.test.nvmestorageunit0.gen03.streamswitch0.streamin.[0].
 [treeopen] top.test.nvmestorageunit0.gen03.streamswitch0.streamout.
 [treeopen] top.test.nvmestorageunit0.gen03.streamswitch0.streamout.[0].
-[treeopen] top.test.nvmestorageunit0.sim.
 [treeopen] top.test.nvmestorageunit0.sim.nvmesim0.
 [treeopen] top.test.nvmestorageunit0.sim.nvmesim0.hostreply.
 [treeopen] top.test.nvmestorageunit0.sim.nvmesim0.hostreq.
@@ -87,7 +78,10 @@ top.test.nvmestate
 -Host
 @800200
 -Registers
+@28
+top.test.nvmestorageunit0.writenvmewrite
 @22
+#{top.test.nvmestorageunit0.regaddress[7:0]} top.test.nvmestorageunit0.regaddress[7] top.test.nvmestorageunit0.regaddress[6] top.test.nvmestorageunit0.regaddress[5] top.test.nvmestorageunit0.regaddress[4] top.test.nvmestorageunit0.regaddress[3] top.test.nvmestorageunit0.regaddress[2] top.test.nvmestorageunit0.regaddress[1] top.test.nvmestorageunit0.regaddress[0]
 #{top.test.nvmestorageunit0.reg_control[31:0]} top.test.nvmestorageunit0.reg_control[31] top.test.nvmestorageunit0.reg_control[30] top.test.nvmestorageunit0.reg_control[29] top.test.nvmestorageunit0.reg_control[28] top.test.nvmestorageunit0.reg_control[27] top.test.nvmestorageunit0.reg_control[26] top.test.nvmestorageunit0.reg_control[25] top.test.nvmestorageunit0.reg_control[24] top.test.nvmestorageunit0.reg_control[23] top.test.nvmestorageunit0.reg_control[22] top.test.nvmestorageunit0.reg_control[21] top.test.nvmestorageunit0.reg_control[20] top.test.nvmestorageunit0.reg_control[19] top.test.nvmestorageunit0.reg_control[18] top.test.nvmestorageunit0.reg_control[17] top.test.nvmestorageunit0.reg_control[16] top.test.nvmestorageunit0.reg_control[15] top.test.nvmestorageunit0.reg_control[14] top.test.nvmestorageunit0.reg_control[13] top.test.nvmestorageunit0.reg_control[12] top.test.nvmestorageunit0.reg_control[11] top.test.nvmestorageunit0.reg_control[10] top.test.nvmestorageunit0.reg_control[9] top.test.nvmestorageunit0.reg_control[8] top.test.nvmestorageunit0.reg_control[7] top.test.nvmestorageunit0.reg_control[6] top.test.nvmestorageunit0.reg_control[5] top.test.nvmestorageunit0.reg_control[4] top.test.nvmestorageunit0.reg_control[3] top.test.nvmestorageunit0.reg_control[2] top.test.nvmestorageunit0.reg_control[1] top.test.nvmestorageunit0.reg_control[0]
 @28
 top.test.axil.toslave.arvalid
@@ -146,9 +140,8 @@ top.test.nvmestorageunit0.gen03.nvmequeues0.ramaddress
 @28
 top.test.nvmestorageunit0.gen03.nvmewrite0.enable
 @22
-#{top.test.nvmestorageunit0.gen03.nvmewrite0.status[31:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.status[31] top.test.nvmestorageunit0.gen03.nvmewrite0.status[30] top.test.nvmestorageunit0.gen03.nvmewrite0.status[29] top.test.nvmestorageunit0.gen03.nvmewrite0.status[28] top.test.nvmestorageunit0.gen03.nvmewrite0.status[27] top.test.nvmestorageunit0.gen03.nvmewrite0.status[26] top.test.nvmestorageunit0.gen03.nvmewrite0.status[25] top.test.nvmestorageunit0.gen03.nvmewrite0.status[24] top.test.nvmestorageunit0.gen03.nvmewrite0.status[23] top.test.nvmestorageunit0.gen03.nvmewrite0.status[22] top.test.nvmestorageunit0.gen03.nvmewrite0.status[21] top.test.nvmestorageunit0.gen03.nvmewrite0.status[20] top.test.nvmestorageunit0.gen03.nvmewrite0.status[19] top.test.nvmestorageunit0.gen03.nvmewrite0.status[18] top.test.nvmestorageunit0.gen03.nvmewrite0.status[17] top.test.nvmestorageunit0.gen03.nvmewrite0.status[16] top.test.nvmestorageunit0.gen03.nvmewrite0.status[15] top.test.nvmestorageunit0.gen03.nvmewrite0.status[14] top.test.nvmestorageunit0.gen03.nvmewrite0.status[13] top.test.nvmestorageunit0.gen03.nvmewrite0.status[12] top.test.nvmestorageunit0.gen03.nvmewrite0.status[11] top.test.nvmestorageunit0.gen03.nvmewrite0.status[10] top.test.nvmestorageunit0.gen03.nvmewrite0.status[9] top.test.nvmestorageunit0.gen03.nvmewrite0.status[8] top.test.nvmestorageunit0.gen03.nvmewrite0.status[7] top.test.nvmestorageunit0.gen03.nvmewrite0.status[6] top.test.nvmestorageunit0.gen03.nvmewrite0.status[5] top.test.nvmestorageunit0.gen03.nvmewrite0.status[4] top.test.nvmestorageunit0.gen03.nvmewrite0.status[3] top.test.nvmestorageunit0.gen03.nvmewrite0.status[2] top.test.nvmestorageunit0.gen03.nvmewrite0.status[1] top.test.nvmestorageunit0.gen03.nvmewrite0.status[0]
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[31:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[31] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[30] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[29] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[28] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[27] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[26] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[25] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[24] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[23] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[22] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[21] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[20] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[19] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[18] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[17] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[16] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[15] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[14] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[13] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[12] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[11] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[10] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[9] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[8] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[7] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[6] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[5] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[4] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[3] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[2] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[1] top.test.nvmestorageunit0.gen03.nvmewrite0.numblocks[0]
-#{top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[63:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[63] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[62] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[61] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[60] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[59] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[58] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[57] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[56] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[55] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[54] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[53] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[52] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[51] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[50] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[49] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[48] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[47] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[46] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[45] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[44] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[43] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[42] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[41] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[40] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[39] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[38] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[37] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[36] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[35] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[34] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[33] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[32] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[31] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[30] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[29] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[28] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[27] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[26] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[25] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[24] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[23] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[22] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[21] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[20] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[19] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[18] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[17] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[16] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[15] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[14] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[13] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[12] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[11] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[10] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[9] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[8] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[7] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[6] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[5] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[4] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[3] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[2] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[1] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[0]
+#{top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[63:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[31] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[30] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[29] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[28] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[27] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[26] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[25] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[24] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[23] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[22] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[21] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[20] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[19] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[18] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[17] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[16] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[15] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[14] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[13] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[12] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[11] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[10] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[9] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[8] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[7] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[6] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[5] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[4] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[3] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[2] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[1] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[0]
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[31:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[31] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[30] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[29] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[28] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[27] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[26] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[25] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[24] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[23] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[22] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[21] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[20] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[19] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[18] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[17] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[16] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[15] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[14] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[13] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[12] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[11] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[10] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[9] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[8] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[7] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[6] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[5] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[4] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[3] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[2] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[1] top.test.nvmestorageunit0.gen03.nvmewrite0.timeus[0]
 @800200
 -InputBuffers
@@ -169,7 +162,6 @@ top.test.nvmestorageunit0.gen03.nvmewrite0.bufferinnum
 top.test.nvmestorageunit0.gen03.nvmewrite0.bufferinnumnext
 top.test.nvmestorageunit0.gen03.nvmewrite0.bufferoutnum
 @22
-#{top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[7:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[7] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[6] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[5] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[4] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[3] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[2] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[1] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.writeaddress[0]
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[10:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[10] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[9] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[8] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[7] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[6] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[5] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[4] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[3] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[2] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[1] top.test.nvmestorageunit0.gen03.nvmewrite0.writeaddress[0]
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][127:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][127] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][126] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][125] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][124] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][123] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][122] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][121] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][120] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][119] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][118] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][117] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][116] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][115] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][114] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][113] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][112] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][111] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][110] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][109] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][108] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][107] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][106] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][105] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][104] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][103] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][102] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][101] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][100] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][99] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][98] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][97] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][96] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][95] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][94] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][93] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][92] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][91] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][90] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][89] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][88] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][87] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][86] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][85] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][84] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][83] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][82] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][81] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][80] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][79] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][78] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][77] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][76] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][75] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][74] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][73] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][72] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][71] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][70] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][69] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][68] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][67] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][66] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][65] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][64] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][63] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][62] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][61] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][60] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][59] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][58] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][57] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][56] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][55] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][54] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][53] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][52] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][51] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][50] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][49] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][48] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][47] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][46] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][45] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][44] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][43] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][42] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][41] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][40] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][39] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][38] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][37] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][36] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][35] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][34] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][33] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][32] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][31] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][30] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][29] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][28] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][27] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][26] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][25] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][24] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][23] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][22] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][21] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][20] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][19] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][18] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][17] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][16] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][15] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][14] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][13] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][12] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][11] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][10] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][9] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][8] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][7] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][6] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][5] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][4] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][3] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][2] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][1] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[0][0]
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][127:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][127] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][126] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][125] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][124] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][123] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][122] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][121] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][120] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][119] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][118] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][117] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][116] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][115] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][114] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][113] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][112] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][111] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][110] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][109] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][108] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][107] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][106] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][105] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][104] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][103] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][102] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][101] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][100] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][99] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][98] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][97] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][96] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][95] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][94] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][93] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][92] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][91] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][90] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][89] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][88] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][87] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][86] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][85] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][84] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][83] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][82] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][81] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][80] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][79] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][78] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][77] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][76] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][75] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][74] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][73] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][72] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][71] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][70] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][69] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][68] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][67] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][66] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][65] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][64] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][63] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][62] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][61] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][60] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][59] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][58] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][57] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][56] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][55] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][54] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][53] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][52] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][51] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][50] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][49] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][48] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][47] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][46] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][45] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][44] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][43] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][42] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][41] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][40] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][39] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][38] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][37] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][36] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][35] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][34] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][33] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][32] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][31] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][30] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][29] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][28] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][27] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][26] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][25] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][24] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][23] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][22] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][21] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][20] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][19] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][18] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][17] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][16] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][15] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][14] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][13] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][12] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][11] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][10] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][9] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][8] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][7] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][6] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][5] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][4] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][3] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][2] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][1] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.ram[1][0]
@@ -180,8 +172,8 @@ top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].full
 top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].inuse1
 top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].inuse2
 @22
-#{top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[63:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[63] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[62] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[61] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[60] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[59] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[58] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[57] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[56] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[55] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[54] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[53] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[52] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[51] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[50] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[49] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[48] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[47] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[46] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[45] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[44] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[43] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[42] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[41] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[40] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[39] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[38] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[37] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[36] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[35] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[34] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[33] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[32] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[31] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[30] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[29] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[28] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[27] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[26] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[25] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[24] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[23] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[22] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[21] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[20] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[19] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[18] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[17] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[16] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[15] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[14] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[13] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[12] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[11] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[10] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[9] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[8] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[7] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[6] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[5] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[4] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[3] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[2] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[1] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[0]
-#{top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[63:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[63] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[62] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[61] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[60] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[59] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[58] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[57] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[56] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[55] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[54] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[53] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[52] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[51] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[50] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[49] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[48] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[47] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[46] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[45] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[44] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[43] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[42] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[41] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[40] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[39] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[38] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[37] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[36] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[35] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[34] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[33] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[32] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[31] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[30] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[29] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[28] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[27] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[26] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[25] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[24] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[23] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[22] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[21] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[20] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[19] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[18] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[17] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[16] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[15] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[14] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[13] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[12] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[11] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[10] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[9] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[8] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[7] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[6] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[5] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[4] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[3] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[2] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[1] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[0]
+#{top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[63:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[31] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[30] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[29] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[28] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[27] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[26] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[25] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[24] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[23] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[22] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[21] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[20] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[19] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[18] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[17] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[16] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[15] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[14] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[13] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[12] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[11] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[10] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[9] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[8] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[7] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[6] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[5] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[4] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[3] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[2] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[1] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[0].blocknumber[0]
+#{top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[63:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[31] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[30] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[29] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[28] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[27] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[26] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[25] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[24] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[23] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[22] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[21] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[20] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[19] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[18] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[17] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[16] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[15] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[14] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[13] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[12] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[11] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[10] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[9] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[8] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[7] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[6] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[5] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[4] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[3] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[2] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[1] top.test.nvmestorageunit0.gen03.nvmewrite0.blocknumber[0]
 @28
 top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].full
 top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].inuse1
@@ -189,7 +181,7 @@ top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].inuse2
 top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].process1
 top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].process2
 @22
-#{top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[63:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[63] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[62] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[61] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[60] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[59] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[58] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[57] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[56] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[55] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[54] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[53] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[52] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[51] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[50] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[49] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[48] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[47] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[46] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[45] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[44] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[43] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[42] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[41] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[40] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[39] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[38] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[37] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[36] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[35] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[34] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[33] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[32] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[31] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[30] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[29] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[28] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[27] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[26] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[25] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[24] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[23] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[22] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[21] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[20] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[19] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[18] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[17] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[16] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[15] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[14] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[13] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[12] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[11] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[10] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[9] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[8] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[7] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[6] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[5] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[4] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[3] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[2] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[1] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[0]
+#{top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[63:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[31] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[30] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[29] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[28] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[27] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[26] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[25] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[24] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[23] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[22] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[21] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[20] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[19] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[18] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[17] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[16] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[15] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[14] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[13] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[12] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[11] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[10] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[9] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[8] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[7] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[6] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[5] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[4] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[3] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[2] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[1] top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[1].blocknumber[0]
 @28
 top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[2].inuse1
 top.test.nvmestorageunit0.gen03.nvmewrite0.buffers[2].inuse2
@@ -223,9 +215,7 @@ top.test.nvmestorageunit0.gen03.nvmewrite0.memreqin.last
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[10:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[10] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[9] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[8] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[7] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[6] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[5] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[4] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[3] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[2] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[1] top.test.nvmestorageunit0.gen03.nvmewrite0.memcount[0]
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[10:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[10] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[9] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[8] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[7] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[6] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[5] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[4] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[3] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[2] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[1] top.test.nvmestorageunit0.gen03.nvmewrite0.memchunkcount[0]
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[7:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[7] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[6] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[5] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[4] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[3] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[2] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[1] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[0]
-@23
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[10:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[10] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[9] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[8] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[7] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[6] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[5] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[4] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[3] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[2] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[1] top.test.nvmestorageunit0.gen03.nvmewrite0.readaddress[0]
-@22
 #{top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[127:0]} top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[127] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[126] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[125] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[124] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[123] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[122] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[121] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[120] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[119] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[118] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[117] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[116] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[115] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[114] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[113] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[112] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[111] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[110] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[109] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[108] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[107] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[106] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[105] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[104] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[103] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[102] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[101] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[100] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[99] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[98] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[97] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[96] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[95] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[94] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[93] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[92] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[91] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[90] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[89] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[88] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[87] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[86] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[85] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[84] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[83] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[82] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[81] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[80] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[79] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[78] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[77] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[76] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[75] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[74] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[73] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[72] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[71] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[70] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[69] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[68] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[67] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[66] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[65] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[64] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[63] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[62] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[61] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[60] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[59] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[58] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[57] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[56] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[55] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[54] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[53] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[52] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[51] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[50] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[49] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[48] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[47] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[46] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[45] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[44] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[43] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[42] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[41] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[40] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[39] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[38] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[37] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[36] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[35] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[34] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[33] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[32] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[31] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[30] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[29] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[28] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[27] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[26] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[25] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[24] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[23] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[22] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[21] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[20] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[19] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[18] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[17] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[16] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[15] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[14] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[13] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[12] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[11] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[10] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[9] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[8] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[7] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[6] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[5] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[4] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[3] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[2] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[1] top.test.nvmestorageunit0.gen03.nvmewrite0.databuffer0.readdata[0]
 @28
 top.test.nvmestorageunit0.gen03.nvmewrite0.memreplyout.ready
index 83244aa6b4ee4ea57fbcb17f715c1aa33d262407..77ee6146c9ff5e4945cba7d6b19e64c9837d4a1f 100644 (file)
@@ -70,7 +70,7 @@ port (
        enable          : in std_logic;                         --! Enable production of data
 
        -- AXIS data output
-       dataStream      : inout AxisStreamType := AxisOutput    --! Output data stream
+       dataOut         : inout AxisStreamType := AxisOutput    --! Output data stream
 );
 end component;
 
@@ -106,7 +106,7 @@ signal hostReply    : AxisStreamType := AxisInput;
 signal hostReq         : AxisStreamType := AxisOutput;
 signal nvmeReq         : AxisStreamType := AxisInput;
 signal nvmeReply       : AxisStreamType := AxisOutput;
-signal dataIn          : AxisStreamType;
+signal testDataStream  : AxisStreamType;
 
 type NvmeStateType is (NVME_STATE_IDLE, NVME_STATE_WRITEDATA, NVME_STATE_READHEAD, NVME_STATE_READDATA);
 signal nvmeState       : NvmeStateType := NVME_STATE_IDLE;
@@ -134,7 +134,7 @@ begin
                hostSend        => hostSend,
                hostRecv        => hostRecv,
                
-               dataIn          => dataIn,
+               dataIn          => testDataStream,
 
                -- NVMe interface
                nvme_clk_p      => '0',
@@ -162,22 +162,35 @@ begin
        
        run : process
        begin
+               axil.toSlave <= ((others => '0'), (others => '0'), '0', (others => '0'), (others => '0'), '0', '0', (others => '0'), (others => '0'), '0', '0');
                wait until reset = '0';
 
-               -- Test NvmeWrite
-               wait for 100 ns;
-               sendData <= '1';
+               if(False) then
+                       -- Test Read/Write NvmeWrite registers
+                       wait for 100 ns;
+                       busRead(clk, axil.toSlave, axil.toMaster, 16#0100#);
+                       busRead(clk, axil.toSlave, axil.toMaster, 16#0104#);
+                       busWrite(clk, axil.toSlave, axil.toMaster, 16#0100#, 16#00000004#);
+                       busRead(clk, axil.toSlave, axil.toMaster, 16#0100#);
 
-               -- Write to NvmeStorage control register to start NvmeWrite processing
-               wait for 100 ns;
-               busWrite(clk, axil.toSlave, axil.toMaster, 4, 16#00000004#);
-
-               -- Read status registers
-               wait for 100 ns;
-               busRead(clk, axil.toSlave, axil.toMaster, 32);
-               busRead(clk, axil.toSlave, axil.toMaster, 36);
-
-               wait;           
+                       wait;
+               end if;
+               
+               if(True) then
+                       -- Start off TestData source and start writing data to Nvme
+                       wait for 100 ns;
+                       sendData <= '1';
+
+                       -- Write to NvmeStorage control register to start NvmeWrite processing
+                       wait for 100 ns;
+                       busWrite(clk, axil.toSlave, axil.toMaster, 16#0100#, 16);               -- Number of blocks
+                       busWrite(clk, axil.toSlave, axil.toMaster, 16#0004#, 16#00000004#);     -- Start
+
+                       wait for 11000 ns;
+                       --busWrite(clk, axil.toSlave, axil.toMaster, 16#0004#, 16#00000000#);   -- Stop
+                       --busWrite(clk, axil.toSlave, axil.toMaster, 16#0004#, 16#00000004#);   -- Start
+                       wait;   
+               end if;
                
                --wait for 1000 ns;
                
@@ -217,7 +230,7 @@ begin
 
                enable          => sendData,
 
-               dataStream      => dataIn
+               dataOut         => testDataStream
        );      
 
 
index 2a0c98303fb6054598f5b135e4ebed9951e40d2d..a46bd518cc0225a1ab235867a2088fc7f3dfe3dd 100644 (file)
@@ -75,7 +75,8 @@ component Clk_core is
        port (
                clk_in1_p       : in std_logic; 
                clk_in1_n       : in std_logic;
-               clk_out1        : out std_logic
+               clk_out1        : out std_logic;
+               locked          : out std_logic
        );                                     
 end component;                 
 
@@ -142,8 +143,11 @@ component Pcie_host
        m_axis_h2c_tlast_1 : out std_logic;
        m_axis_h2c_tvalid_1 : out std_logic;
        m_axis_h2c_tready_1 : in std_logic;
-       m_axis_h2c_tkeep_1 : out std_logic_vector(15 downto 0)
+       m_axis_h2c_tkeep_1 : out std_logic_vector(15 downto 0);
 
+       int_qpll1lock_out : out std_logic_vector(0 to 0);
+       int_qpll1outrefclk_out : out std_logic_vector(0 to 0);
+       int_qpll1outclk_out : out std_logic_vector(0 to 0)
        );
 end component;
 
@@ -221,7 +225,7 @@ port (
        enable          : in std_logic;                         --! Enable production of data
 
        -- AXIS data output
-       dataStream      : inout AxisStreamType := AxisOutput    --! Output data stream
+       dataOut         : inout AxisStreamType := AxisOutput    --! Output data stream
 );
 end component;
 
@@ -251,9 +255,12 @@ signal hostSend                    : AxisStreamType;
 signal hostRecv                        : AxisStreamType;
 signal nvmeReq                 : AxisStreamType;
 signal nvmeReply               : AxisStreamType;
-signal dataIn                  : AxisStreamType;
+signal testDataStream          : AxisStreamType;
 signal dataEnabled             : std_logic;
 
+signal hostSend1               : AxisStreamType := AxisInput;
+signal hostRecv1               : AxisStreamType := AxisOutput;
+
 begin
        -- System clock just used for a boot reset
        sys_clk_buf : Clk_core port map (
@@ -413,6 +420,67 @@ begin
        );      
        end generate;
        
+       zap12: if false generate
+       -- NVME Storage interface
+       axil_reset <= not axil_reset_n;
+       
+       hostSend.ready  <= '1';
+
+       hostSend1.valid <= '0';
+       hostSend1.last  <= '0';
+       hostSend1.keep  <= (others => '0');
+       hostSend1.data  <= (others => '0');
+       hostRecv1.ready <= '0';
+       
+       nvmeStorageUnit1 : NvmeStorageUnit
+       port map (
+               clk             => axil_clk,
+               reset           => axil_reset,
+
+               -- Control and status interface
+               axilIn          => axil.toSlave,
+               axilOut         => axil.toMaster,
+
+               -- From host to NVMe request/reply streams
+               hostSend        => hostSend1,
+               hostRecv        => hostRecv1,
+
+               -- AXIS data stream input
+               dataEnabledOut  => dataEnabled,
+               dataIn          => testDataStream,
+
+               -- NVMe interface
+               nvme_clk_p      => nvme_clk_p,
+               nvme_clk_n      => nvme_clk_n,
+               nvme_reset_n    => nvme_reset_n,
+               nvme_exp_txp    => nvme0_exp_txp,
+               nvme_exp_txn    => nvme0_exp_txn,
+               nvme_exp_rxp    => nvme0_exp_rxp,
+               nvme_exp_rxn    => nvme0_exp_rxn,
+
+               -- Debug
+               leds            => leds_l(3 downto 0)
+       );
+
+       -- Echo this stream     
+       nvmeReply.valid <= nvmeReq.valid;   
+       nvmeReply.last  <= nvmeReq.last;   
+       nvmeReply.keep  <= nvmeReq.keep;   
+       nvmeReply.data  <= nvmeReq.data;  
+       nvmeReq.ready   <= nvmeReply.ready;
+
+       -- The test data interface
+       testData1 : TestData
+       port map (
+               clk             => axil_clk,
+               reset           => axil_reset,
+
+               enable          => '1',
+
+               dataOut         => hostRecv
+       );
+       end generate;
+
        zap13: if true generate
        -- NVME Storage interface
        axil_reset <= not axil_reset_n;
@@ -432,7 +500,7 @@ begin
 
                -- AXIS data stream input
                dataEnabledOut  => dataEnabled,
-               dataIn          => dataIn,
+               dataIn          => testDataStream,
 
                -- NVMe interface
                nvme_clk_p      => nvme_clk_p,
@@ -462,7 +530,7 @@ begin
 
                enable          => dataEnabled,
 
-               dataStream      => dataIn
+               dataOut         => testDataStream
        );
        end generate;
        
index 140aef3358025b6092681eaf0243d45f533915f3..9d1f03cc13d396f5ddf0632ff7a7fb7ff272233e 100644 (file)
@@ -5,7 +5,7 @@
 #\r
 \r
 # System timings\r
-create_clock -period 5.000 -name sys_clk_p -waveform {0.000 2.500} [get_ports sys_clk_p]\r
+#create_clock -period 5.000 -name sys_clk_p -waveform {0.000 2.500} [get_ports sys_clk_p]\r
 create_clock -period 10.000 -name pci_clk [get_ports pci_clk_p]\r
 create_clock -period 10.000 -name nvme_clk [get_ports nvme_clk_p]\r
 \r
index 0401950c3316b3ccbbdd295a75f888c5b904326c..a24d2f6bf5a6803fb08171992b0ba711ee139f4a 100644 (file)
@@ -84,7 +84,7 @@ constant rom  : RomType(0 to 27) := (
        setHeader(1, 16#000C#, 1, 0), to_stl(x"FFFFFFFF", 128),
 
        -- Admin queue lengths to 8 entries each
-       setHeader(1, 16#0024#, 1, 0), to_stl(x"00070007", 128),
+       setHeader(1, 16#0024#, 1, 0), zeros(96) & to_stl(NvmeQueueNum-1, 16) & to_stl(NvmeQueueNum-1, 16),
 
        -- Admin request queue base address
        setHeader(1, 16#0028#, 1, 0), to_stl(x"02000000", 128),
@@ -94,10 +94,10 @@ constant rom        : RomType(0 to 27) := (
 
        -- Create DataWrite reply queue (8 entries)  by sending 64byte request to Admin queue
        setHeader(12, 16#02000000#, 16, 0),
-               concat('0', 96) & x"02000005",                          -- Dwords 3, 2, 1, 0
-               concat('0', 32) & x"02110000" & concat('0', 64),        -- DWords 7, 6, 5, 4
-               x"00000001" & x"00070001" & concat('0', 64),            -- DWords 11, 10, 9, 8
-               concat('0', 128),                                       -- DWords 15, 14, 13, 12
+               zeros(96) & x"02000005",                                        -- Dwords 3, 2, 1, 0
+               zeros(32) & x"02110000" & zeros(64),                            -- DWords 7, 6, 5, 4
+               x"00000001" & to_stl(NvmeQueueNum-1, 16) & x"0001" & zeros(64), -- DWords 11, 10, 9, 8
+               zeros(128),                                                     -- DWords 15, 14, 13, 12
 
        -- Notify queue entry to Nvme
        setHeader(1, 16#1000#, 1, 0), to_stl(1, 128),
@@ -106,10 +106,10 @@ constant rom      : RomType(0 to 27) := (
 
        -- Create DataWrite request queue by sending 64byte request to Admin queue
        setHeader(12, 16#02000000#, 16, 0),
-               concat('0', 96) & x"02000001",                          -- Dwords 3, 2, 1, 0
-               concat('0', 32) & x"02010000" & concat('0', 64),        -- DWords 7, 6, 5, 4
-               x"00000001" & x"00070001" & concat('0', 64),            -- DWords 11, 10, 9, 8
-               concat('0', 128),                                       -- DWords 15, 14, 13, 12
+               zeros(96) & x"02000001",                                        -- Dwords 3, 2, 1, 0
+               zeros(32) & x"02010000" & zeros(64),                            -- DWords 7, 6, 5, 4
+               x"00000001" & to_stl(NvmeQueueNum-1, 16) & x"0001" & zeros(64), -- DWords 11, 10, 9, 8
+               zeros(128),                                                     -- DWords 15, 14, 13, 12
 
        -- Notify queue entry to Nvme
        setHeader(1, 16#1000#, 1, 0), to_stl(2, 128),
index 8c427a8c630f6b1ad88c9bb9cd1578fa489adfbc..bd4eb58f3aa7fc0bfdde5f7d916333c956bf647f 100644 (file)
@@ -56,7 +56,7 @@ architecture Behavioral of NvmeQueues is
 
 constant TCQ           : time          := 1 ns;
 constant NUM_QUEUES    : integer       := 4;
-constant RAM_SIZE      : integer       := (NUM_QUEUES * NumQueueEntries * 4);
+constant RAM_SIZE      : integer       := (NUM_QUEUES * NumQueueEntries * 4);  -- Note uses same size for reply queues which is wasteful
 
 subtype QueueNumRange  is integer range 17 downto 16;
 subtype QueuePosType   is unsigned(log2(NumQueueEntries)-1 downto 0);
index 1dcc94c323d0c3892cd5d57a275a841931cbff37..27eeddac5d503ef10a2be1016ba78f2b0e3851f9 100644 (file)
@@ -36,7 +36,8 @@ use work.NvmeStoragePkg.all;
 package NvmeStorageIntPkg is
        --! System constants
        constant NvmeStorageBlockSize   : integer := 4096;      --! System block size
-       constant NvmeWriteQueueNum      : integer := 8;         --! The number of data write queue entries
+       constant NvmeQueueNum           : integer := 16;        --! The number of queue entries. Has to be greater than NvmeWriteNum
+       constant NvmeWriteNum           : integer := 8;         --! The number of concurrent data write's.
        constant PcieMaxPayloadSize     : integer := 32;        --! The maximum Pcie packet size in 32bit DWords
        
        --! Generaly useful functions
index 8f340a0e26bf7c0ad3a0d22162d45090ec4784c6..3310ca6cb7bc51a6ce56e061ac922d9313055771 100644 (file)
@@ -213,6 +213,10 @@ component Pcie_nvme0
        sys_clk : in std_logic;
        sys_clk_gt : in std_logic;
        sys_reset : in std_logic;
+       
+       int_qpll1lock_out : out std_logic_vector(0 to 0);
+       int_qpll1outrefclk_out : out std_logic_vector(0 to 0);
+       int_qpll1outclk_out : out std_logic_vector(0 to 0);
        phy_rdy_out : out std_logic
        );
 end component;
@@ -236,7 +240,7 @@ end component;
 
 component NvmeQueues is
 generic(
-       NumQueueEntries : integer       := 8;                   --! The number of entries per queue
+       NumQueueEntries : integer       := NvmeQueueNum;        --! The number of entries per queue
        Simulate        : boolean       := False
 );
 port (
@@ -316,8 +320,10 @@ port (
        memReqIn        : inout AxisStreamType := AxisInput;    --! From Nvme request stream (4)
        memReplyOut     : inout AxisStreamType := AxisOutput;   --! To Nvme reply stream
        
-       regAddress      : in unsigned(1 downto 0);              --! Status register to read
-       regData         : out std_logic_vector(31 downto 0)     --! Status register contents
+       regWrite        : in std_logic;                         --! Enable write to register
+       regAddress      : in unsigned(5 downto 0);              --! Register to read/write
+       regDataIn       : in std_logic_vector(31 downto 0);     --! Register write data
+       regDataOut      : out std_logic_vector(31 downto 0)     --! Register contents
 );
 end component;
 
@@ -375,11 +381,12 @@ subtype RegDataType               is std_logic_vector(RegWidth-1 downto 0);
 type StateType                 is (STATE_START, STATE_IDLE, STATE_WRITE, STATE_READ1, STATE_READ2);
 signal state                   : StateType := STATE_START;
 
-signal address                 : std_logic_vector(3 downto 0) := (others => '0');
+signal regAddress              : unsigned(7 downto 0) := (others => '0');
 signal reg_id                  : RegDataType := x"56010200";
 signal reg_control             : RegDataType := (others => '0');
 signal reg_status              : RegDataType := (others => '0');
 signal reg_nvmeWrite           : RegDataType := (others => '0');
+signal writeNvmeWrite          : std_logic := '0';
 
 -- Nvme configuration signals
 signal configStart             : std_logic := 'U';
@@ -421,10 +428,9 @@ begin
                axil0In         => axilIn,
                axil0Out        => axilOut,
 
-               --clk1          => nvme_user_clk,
-               --reset1        => nvme_user_reset,
                clk1            => clk,
                reset1          => reset,
+               --clk1          => nvme_user_clk,
 
                -- Bus1
                axil1In         => axil1Out,
@@ -466,11 +472,13 @@ begin
 
        
        -- Register access
-       axil1Out.rdata <=       reg_id when address = "0000" else
-                               reg_control when address = "0001" else
-                               reg_status when address = "0010" else
-                               reg_nvmeWrite when(address(3 downto 2) = "10") else
+       axil1Out.rdata <=       reg_id when(regAddress = 0) else
+                               reg_control when(regAddress = 1) else
+                               reg_status when(regAddress = 2) else
+                               reg_nvmeWrite when((regAddress >= 64) and (regAddress < 128)) else
                                x"FFFFFFFF";
+
+       writeNvmeWrite <= axil1In.wvalid when((regAddress >= 64) and (regAddress < 128)) else '0';
        
        -- Status register bits
        reg_status(0)           <= reset_local_run;
@@ -509,12 +517,12 @@ begin
 
                                when STATE_IDLE =>
                                        if(axil1In.awvalid= '1') then
-                                               address                 <= axil1In.awaddr(5 downto 2);
+                                               regAddress              <= unsigned(axil1In.awaddr(9 downto 2));
                                                axil1Out.awready        <= '1';
                                                state                   <= STATE_WRITE;
 
                                        elsif(axil1In.arvalid= '1') then
-                                               address                 <= axil1In.araddr(5 downto 2);
+                                               regAddress              <= unsigned(axil1In.araddr(9 downto 2));
                                                axil1Out.arready        <= '1';
                                                state                   <= STATE_READ1;
                                        end if;
@@ -523,7 +531,7 @@ begin
                                        axil1Out.awready        <= '0';
 
                                        if(axil1In.wvalid = '1') then
-                                               if(address = "0001") then
+                                               if(regAddress = 1) then
                                                        if(axil1In.wdata(0) = '1') then
                                                                reg_control     <= (others => '0');
                                                                reset_local_run <= '1';
@@ -846,9 +854,11 @@ begin
 
                memReqIn        => writeMemRecv,
                memReplyOut     => writeMemSend,
-               
-               regAddress      => unsigned(address(1 downto 0)),
-               regData         => reg_nvmeWrite
+
+               regWrite        => writeNvmeWrite,
+               regAddress      => regAddress(5 downto 0),
+               regDataIn       => axil1In.wdata,
+               regDataOut      => reg_nvmeWrite
        );
 
        end generate;
index 826d7ea3fb8720df9840545cfc51168a8bcd22da..864dbef65653a2ef1075652adb4cf848fb3452a7 100644 (file)
@@ -58,8 +58,10 @@ port (
        memReqIn        : inout AxisStreamType := AxisInput;    --! From Nvme request stream (4)
        memReplyOut     : inout AxisStreamType := AxisOutput;   --! To Nvme reply stream
        
-       regAddress      : in unsigned(1 downto 0);              --! Status register to read
-       regData         : out std_logic_vector(31 downto 0)     --! Status register contents
+       regWrite        : in std_logic;                         --! Enable write to register
+       regAddress      : in unsigned(5 downto 0);              --! Register to read/write
+       regDataIn       : in std_logic_vector(31 downto 0);     --! Register write data
+       regDataOut      : out std_logic_vector(31 downto 0)     --! Register contents
 );
 end;
 
@@ -77,7 +79,7 @@ constant SimDelay     : boolean := False;                     --! Input data delay after each packet f
 constant NumBlocksRun  : integer := 262144;                    --! The total number of blocks in a run
 
 constant NvmeBlocks    : integer := BlockSize / 512;           --! The number of Nvme blocks per NvmeStorage system block
-constant RamSize       : integer := (NvmeWriteQueueNum * BlockSize) / 16;      -- One block per write buffer
+constant RamSize       : integer := (NvmeWriteNum * BlockSize) / 16;   -- One block per write buffer
 constant AddressWidth  : integer := log2(RamSize);
 constant BlockSizeWidth        : integer := log2(BlockSize);
 
@@ -108,12 +110,13 @@ type BufferType is record
        full            : std_logic;                            --! The buffer is full
        process1        : std_logic;                            --! process1 and process2 are used to indicate buffer is being sent to Nvme
        process2        : std_logic;
-       blockNumber     : unsigned(63 downto 0);                --! The first block number in the buffer
+       blockNumber     : unsigned(31 downto 0);                --! The first block number in the buffer
 end record;
 
-type BufferArrayType   is array (0 to NvmeWriteQueueNum-1) of BufferType;
+subtype RegisterType   is unsigned(31 downto 0);
+type BufferArrayType   is array (0 to NvmeWriteNum-1) of BufferType;
 
-type InStateType       is (INSTATE_IDLE, INSTATE_INIT, INSTATE_CHOOSE, INSTATE_INPUT_BLOCK, INSTATE_DELAY);
+type InStateType       is (INSTATE_IDLE, INSTATE_INIT, INSTATE_CHOOSE, INSTATE_INPUT_BLOCK, INSTATE_DELAY, INSTATE_COMPLETE);
 type StateType         is (STATE_IDLE, STATE_INIT, STATE_RUN, STATE_COMPLETE,
                                STATE_QUEUE_HEAD, STATE_QUEUE_0, STATE_QUEUE_1, STATE_QUEUE_2, STATE_QUEUE_3,
                                STATE_WAIT_REPLY);
@@ -123,7 +126,7 @@ signal inState              : InStateType := INSTATE_IDLE;
 signal state           : StateType := STATE_IDLE;
 signal replyState      : ReplyStateType := REPLY_STATE_QUEUE_REPLY1;
 
-signal blockNumber     : unsigned(63 downto 0) := (others => '0');
+signal blockNumber     : unsigned(31 downto 0) := (others => '0');
 signal numIn           : integer := 0;
 signal num             : integer := 0;
 signal numReply                : integer := 0;
@@ -137,10 +140,10 @@ signal readAddress        : unsigned(AddressWidth-1 downto 0) := (others => '0');
 signal readData                : std_logic_vector(127 downto 0) := (others => '0');
 
 signal buffers         : BufferArrayType := (others => ('Z', 'Z', 'Z', 'Z', 'Z', (others => 'Z')));
-signal bufferInNum     : integer range 0 to NvmeWriteQueueNum-1 := 0;
-signal bufferInNumNext : integer range 0 to NvmeWriteQueueNum-1 := 0;
-signal bufferOutNum    : integer range 0 to NvmeWriteQueueNum-1 := 0;
-signal bufferOutNumNext        : integer range 0 to NvmeWriteQueueNum-1 := 0;
+signal bufferInNum     : integer range 0 to NvmeWriteNum-1 := 0;
+signal bufferInNumNext : integer range 0 to NvmeWriteNum-1 := 0;
+signal bufferOutNum    : integer range 0 to NvmeWriteNum-1 := 0;
+signal bufferOutNumNext        : integer range 0 to NvmeWriteNum-1 := 0;
 
 
 -- Buffer read
@@ -154,16 +157,17 @@ signal memCount           : unsigned(10 downto 0);                        -- DWord data send count
 signal memChunkCount   : unsigned(10 downto 0);                        -- DWord data send within a chunk count
 signal memData         : std_logic_vector(127 downto 0);
 
--- Status information
-signal status          : unsigned(31 downto 0) := (others => '0');     -- The system status
-signal numBlocks       : unsigned(31 downto 0) := (others => '0');     -- The number of blocks written
-signal timeUs          : unsigned(31 downto 0) := (others => '0');     -- The time in us
+-- Register information
+signal dataChunkSize   : RegisterType := (others => '0');      -- The data chunk size in blocks
+signal error           : RegisterType := (others => '0');      -- The system errors status
+signal numBlocks       : RegisterType := (others => '0');      -- The number of blocks written
+signal timeUs          : RegisterType := (others => '0');      -- The time in us
 signal timeCounter     : integer range 0 to 125 := 0;
 
 function addPos(v: integer; a: integer) return integer is
 begin
-       if(v + a > NvmeWriteQueueNum-1) then
-               return v + a - NvmeWriteQueueNum;
+       if(v + a > NvmeWriteNum-1) then
+               return v + a - NvmeWriteNum;
        else
                return v + a;
        end if;
@@ -171,15 +175,33 @@ end;
 
 function bufferAddress(bufferNum: integer) return unsigned is
 begin
-       return to_unsigned(bufferNum, 3) & to_unsigned(0, AddressWidth-3);
+       return to_unsigned(bufferNum, log2(NvmeWriteNum)) & to_unsigned(0, AddressWidth-log2(NvmeWriteNum));
 end;
 
 function pcieAddress(bufferNum: integer) return std_logic_vector is
 begin
-       return x"05" & zeros(32-8-3-(BlockSizeWidth)) & to_stl(bufferNum, 3) & zeros(BlockSizeWidth);
+       return x"05" & zeros(32-8-log2(NvmeWriteNum)-(BlockSizeWidth)) & to_stl(bufferNum, log2(NvmeWriteNum)) & zeros(BlockSizeWidth);
 end;
 
 begin
+       -- Register access
+       regDataOut      <= std_logic_vector(dataChunkSize) when(regAddress = 0)
+                       else std_logic_vector(error) when(regAddress = 1)
+                       else std_logic_vector(numBlocks) when(regAddress = 2)
+                       else std_logic_vector(timeUs);
+       
+       -- Register process
+       process(clk)
+       begin
+               if(rising_edge(clk)) then
+                       if(reset = '1') then
+                               dataChunkSize   <= (others => '0');
+                       elsif((regWrite = '1') and (regAddress = "00")) then
+                               dataChunkSize   <= unsigned(regDataIn);
+                       end if;
+               end if;
+       end process;
+
        -- Input buffers in BlockRAM
        dataBuffer0 : DataBuffer
        port map (
@@ -195,16 +217,16 @@ begin
                readData        => readData
        );
 
-       -- Input data process. Accepts data from input stream and stores it into NvmeWriteQueueNum buffers
+       -- Input data process. Accepts data from input stream and stores it into NvmeWriteNum buffers
        dataIn.ready <= writeEnable;
 
        process(clk)
-       variable p: integer range 0 to NvmeWriteQueueNum-1;
+       variable p: integer range 0 to NvmeWriteNum-1;
        variable c: integer;
        begin
                if(rising_edge(clk)) then
                        if(reset = '1') then
-                               for i in 0 to NvmeWriteQueueNum-1 loop
+                               for i in 0 to NvmeWriteNum-1 loop
                                        buffers(i).inUse1 <= '0';
                                        buffers(i).full <= '0';
                                        buffers(i).blockNumber <= (others => '0');
@@ -223,7 +245,7 @@ begin
 
                                when INSTATE_INIT =>
                                        -- Initialise for next run
-                                       for i in 0 to NvmeWriteQueueNum-1 loop
+                                       for i in 0 to NvmeWriteNum-1 loop
                                                buffers(i).inUse1 <= '0';
                                                buffers(i).full <= '0';
                                        end loop;
@@ -235,8 +257,12 @@ begin
 
                                when INSTATE_CHOOSE =>
                                        if(enable = '1') then
+                                               if(blockNumber >= dataChunkSize) then
+                                                       inState <= INSTATE_COMPLETE;
+                                               end if;
+                                               
                                                -- Decide on which buffer to use based on inuse state.
-                                               for i in 0 to NvmeWriteQueueNum-1 loop
+                                               for i in 0 to NvmeWriteNum-1 loop
                                                        p := addPos(bufferInNumNext, i);
                                                        if(buffers(p).inUse1 = buffers(p).inUse2) then
                                                                bufferInNum             <= p;
@@ -261,7 +287,7 @@ begin
                                                if(dataIn.last = '1') then
                                                        writeEnable                     <= '0';
                                                        buffers(bufferInNum).full       <= '1';
-                                                       blockNumber                     <= blockNumber + NvmeBlocks;
+                                                       blockNumber                     <= blockNumber + 1;
                                                        if(SimDelay) then
                                                                c       := 400;
                                                                inState <= INSTATE_DELAY;
@@ -279,22 +305,23 @@ begin
                                        --if(c = 0) then
                                                inState                         <= INSTATE_CHOOSE;
                                        end if;
+                                       
+                               when INSTATE_COMPLETE =>
+                                       if(enable = '0') then
+                                               inState <= INSTATE_IDLE;
+                                       end if;
+
                                end case;
                        end if;
                end if;
        end process;
 
-       -- Regsiter access
-       regData <= std_logic_vector(status) when(regAddress = 0)
-                       else std_logic_vector(numBlocks) when(regAddress = 1)
-                       else std_logic_vector(timeUs);
-       
        nvmeReplyHead <= to_NvmeReplyHeadType(replyIn.data);
        
        -- Process data write. This takes the input buffers and sends a write request to the Nvme for each one that is full.
-       -- It waits for replices if there are more than NvmeWriteQueueNum-1 writes in progress.
+       -- It waits for replices if there are more than NvmeWriteNum-1 writes in progress.
        process(clk)
-       variable p: integer range 0 to NvmeWriteQueueNum-1;
+       variable p: integer range 0 to NvmeWriteNum-1;
        begin
                if(rising_edge(clk)) then
                        if(reset = '1') then
@@ -305,7 +332,7 @@ begin
                                timeCounter             <= 0;
                                bufferOutNum            <= 0;
                                num                     <= 0;
-                               for i in 0 to NvmeWriteQueueNum-1 loop
+                               for i in 0 to NvmeWriteNum-1 loop
                                        buffers(i).process1 <= '0';
                                end loop;
                                state                   <= STATE_IDLE;
@@ -321,19 +348,19 @@ begin
                                        timeUs          <= (others => '0');
                                        timeCounter     <= 0;
                                        num             <= 0;
-                                       for i in 0 to NvmeWriteQueueNum-1 loop
+                                       for i in 0 to NvmeWriteNum-1 loop
                                                buffers(i).process1 <= '0';
                                        end loop;
                                        state           <= STATE_RUN;
                                        
                                when STATE_RUN =>
                                        if(enable = '1') then
-                                               if(num >= NumBlocksRun) then
+                                               if(num >= dataChunkSize) then
                                                        state <= STATE_COMPLETE;
                                                
                                                else
                                                        -- Decide on which buffer to output
-                                                       for i in 0 to NvmeWriteQueueNum-1 loop
+                                                       for i in 0 to NvmeWriteNum-1 loop
                                                                p := addPos(bufferOutNumNext, i);
                                                                if((buffers(p).full = '1') and (buffers(p).inUse1 /= buffers(p).inUse2) and (buffers(p).process1 = buffers(p).process2)) then
                                                                        buffers(p).process1     <= not buffers(p).process2;
@@ -371,7 +398,7 @@ begin
 
                                when STATE_QUEUE_1 =>
                                        if(requestOut.valid = '1' and requestOut.ready = '1') then
-                                               requestOut.data <= std_logic_vector(buffers(bufferOutNum).blockNumber) & zeros(64);
+                                               requestOut.data <= zeros(29) & std_logic_vector(buffers(bufferOutNum).blockNumber) & zeros(3 + 64);
                                                state           <= STATE_QUEUE_2;
                                        end if;
 
@@ -387,11 +414,14 @@ begin
                                        if(requestOut.valid = '1' and requestOut.ready = '1') then
                                                requestOut.last         <= '0';
                                                requestOut.valid        <= '0';
-                                               if(num > (numReply + 4)) then
-                                                       state <= STATE_WAIT_REPLY;
-                                               else
-                                                       state <= STATE_RUN;
-                                               end if;
+                                               
+                                               state <= STATE_RUN;
+                                               
+                                               --if(num > (numReply + 4)) then
+                                               --      state <= STATE_WAIT_REPLY;
+                                               --else
+                                               --      state <= STATE_RUN;
+                                               --end if;
                                        end if;
 
                                when STATE_WAIT_REPLY =>
@@ -417,15 +447,15 @@ begin
        
        -- Process replies. This accepts Write request replies from the Nvme storing any errors and marking the buffer as free.
        process(clk)
-       variable p: integer range 0 to NvmeWriteQueueNum-1;
+       variable p: integer range 0 to NvmeWriteNum-1;
        begin
                if(rising_edge(clk)) then
                        if(reset = '1') then
                                replyIn.ready           <= '1';
                                numBlocks               <= (others => '0');
-                               status                  <= (others => '0');
+                               error                   <= (others => '0');
                                numReply                <= 0;
-                               for i in 0 to NvmeWriteQueueNum-1 loop
+                               for i in 0 to NvmeWriteNum-1 loop
                                        buffers(i).inUse2       <= '0';
                                        buffers(i).process2     <= '0';
                                end loop;
@@ -435,7 +465,7 @@ begin
                                when REPLY_STATE_QUEUE_REPLY1 =>
                                        if(state = STATE_INIT) then
                                                numBlocks       <= (others => '0');
-                                               status          <= (others => '0');
+                                               error           <= (others => '0');
                                                numReply        <= 0;
                                        end if;
                                        
@@ -445,11 +475,10 @@ begin
 
                                when REPLY_STATE_QUEUE_REPLY2 =>
                                        if(replyIn.valid = '1' and replyIn.ready = '1') then
-                                               if(status = 0) then
-                                                       status(15 downto 0) <= '0' & nvmeReplyHead.status;
+                                               if(error = 0) then
+                                                       error(15 downto 0) <= '0' & nvmeReplyHead.status;
                                                end if;
 
-                                               status(31 downto 16)    <= status(31 downto 16) + 1;
                                                numBlocks               <= numBlocks + 1;
                                                numReply                <= numReply + 1;
                                                p                       := to_integer(nvmeReplyHead.cid(2 downto 0));
index 16dcb52e26e776a1000085b9c71cb78e63312d2c..7f41368d0b381a240c230768f4eb3960f0064e3f 100644 (file)
@@ -14,6 +14,7 @@
 --! @details
 --! This module provides a sequence of 32bit incrementing values over a 128 bit wide AXI stream.
 --! It sets the Axi streams last signal in the last word transfer of a configurable BlockSize block of data.
+--! the enable signal enables it's operation and when set to 0 clears its state back to intial reset state.
 --!
 --! @copyright GNU GPL License
 --! Copyright (c) Beam Ltd, All rights reserved. <br>
@@ -48,10 +49,10 @@ port (
        reset           : in std_logic;                         --! The active high reset line
 
        -- Control and status interface
-       enable          : in std_logic;                         --! Enable production of data
+       enable          : in std_logic;                         --! Enable production of data. Clears to reset state when set to 0.
 
        -- AXIS data output
-       dataStream      : inout AxisStreamType := AxisOutput    --! Output data stream
+       dataOut         : inout AxisStreamType := AxisOutput    --! Output data stream
 );
 end;
 
@@ -65,32 +66,29 @@ signal countBlock   : unsigned(log2(BlockSize/BytesPerWord)-1 downto 0) := (others
 
 begin
        -- Output incrementing data stream
-       dataStream.data <= std_logic_vector((data + 3) & (data + 2) & (data + 1) & data);
+       dataOut.data <= std_logic_vector((data + 3) & (data + 2) & (data + 1) & data);
+       dataOut.keep <= ones(16);
+       dataOut.last <= '1' when(countBlock = (BlockSize/BytesPerWord) - 1) else '0';
                
        -- Generate data stream
        process(clk)
        begin
                if(rising_edge(clk)) then
                        if(reset = '1') then
-                               data                    <= (others => '0');
-                               dataStream.valid        <= '0';
-                               dataStream.last         <= '0';
+                               data            <= (others => '0');
+                               countBlock      <= (others => '0');
+                               dataOut.valid   <= '0';
                        else
                                if(enable = '1') then
-                                       dataStream.valid <= '1';
+                                       dataOut.valid <= '1';
+                                       if((dataOut.valid = '1') and (dataOut.ready = '1')) then
+                                               data            <= data + 4;
+                                               countBlock      <= countBlock + 1;
+                                       end if;
                                else
-                                       dataStream.valid <= '0';
-                               end if;
-                               
-                               if((enable = '1') and (dataStream.valid = '1') and (dataStream.ready = '1')) then
-                                       data <= data + 4;
-                                       countBlock <= countBlock + 1;
-                               end if;
-                               
-                               if(countBlock = (BlockSize/BytesPerWord) - 2) then
-                                       dataStream.last <= '1';
-                               else
-                                       dataStream.last <= '0';
+                                       data            <= (others => '0');
+                                       countBlock      <= (others => '0');
+                                       dataOut.valid   <= '0';
                                end if;
                        end if;
                end if;
index 9892143fead7b0dea4523314a6ae2d5a74315111..f5549db7268a17f5c7acb4a7981866840cf274c3 100644 (file)
@@ -84,6 +84,8 @@ int BSemaphore::getValue() const {
        return v;
 }
 
+
+
 void tprintf(const char* fmt, ...){
        va_list         args;
        char            tbuf[64];
index fc3817a4f6e8d6ad1a3b12f3dba941367da3ea0d..69697cd27c3e078dd97436acf2d54aa50da12792 100644 (file)
@@ -81,7 +81,7 @@ NvmeAccess::NvmeAccess(){
        obufTx2 = 0;
        obufRx = 0;
        otag = 0;
-       oqueueNum = 8;
+       oqueueNum = 16;
        oqueueAdminRx = 0;
        oqueueAdminTx = 0;
        oqueueAdminId = 0;
@@ -219,11 +219,12 @@ void NvmeAccess::reset(){
                data = 0x06;
                pcieWrite(10, 4, 1, &data);                     ///< Set PCIe config command for memory accesses
        }
+       usleep(100000);
 }
 #endif
 
 // Send a queued request to the Nvme
-int NvmeAccess::nvmeRequest(int queue, int opcode, BUInt32 address, BUInt32 arg10, BUInt32 arg11, BUInt32 arg12){
+int NvmeAccess::nvmeRequest(Bool wait, int queue, int opcode, BUInt32 address, BUInt32 arg10, BUInt32 arg11, BUInt32 arg12){
        int     e;
        BUInt32 cmd[16];
 
@@ -251,10 +252,12 @@ int NvmeAccess::nvmeRequest(int queue, int opcode, BUInt32 address, BUInt32 arg1
        }
 #endif
 
-       printf("nvmeRequest:\n"); bhd32(cmd, 16);
+       dl1printf("nvmeRequest:\n"); dl1hd32(cmd, 16);
+       oqueueReplySem.wait(0);
+
        if(UseQueueEngine){
                // Send message to queue engine
-               printf("Write to queue: %8.8x\n", 0x02000000 | (queue << 16));
+               dl2printf("Write to queue: %8.8x\n", 0x02000000 | (queue << 16));
                if(e = pcieWrite(1, 0x02000000 | (queue << 16), 16, cmd))
                        return e;
        }
@@ -290,6 +293,11 @@ int NvmeAccess::nvmeRequest(int queue, int opcode, BUInt32 address, BUInt32 arg1
                        }
                }
        }
+       
+       if(wait){
+               // Wait for reply
+               oqueueReplySem.wait();
+       }
 
        return 0;
 }
@@ -315,8 +323,8 @@ int NvmeAccess::nvmeProcess(){
 
                dl3printf("NvmeAccess::nvmeProcess: awoken with: %d bytes\n", nt);
                //dl3hd32(obufRx, nt / 4);
-               printf("NvmeAccess::nvmeProcess: awoken with: %d bytes\n", nt);
-               bhd32(obufRx, nt / 4);
+               //printf("NvmeAccess::nvmeProcess: awoken with: %d bytes\n", nt);
+               //bhd32(obufRx, nt / 4);
 
                // Determine if packet is a reply or an Nvme request from the reply bit in the header
                if(obufRx[2] & 0x80000000){
@@ -383,8 +391,8 @@ int NvmeAccess::nvmeProcess(){
                        if((request.address & 0x00FF0000) == 0x00100000){
                                status = request.data[3] >> 17;
                                dl3printf("NvmeAccess::nvmeProcess: NvmeReply: Queue: %d QueueHeadPointer: %d Status: 0x%4.4x Command: 0x%x\n", request.data[2] >> 16, request.data[2] & 0xFFFF, request.data[3] >> 17, request.data[3] & 0xFFFF);
-                               printf("NvmeAccess::nvmeProcess: NvmeReply: Queue: %d QueueHeadPointer: %d Status: 0x%4.4x Command: 0x%x\n", request.data[2] >> 16, request.data[2] & 0xFFFF, request.data[3] >> 17, request.data[3] & 0xFFFF);
-                               bhd32(&request, nt / 4);
+                               //printf("NvmeAccess::nvmeProcess: NvmeReply: Queue: %d QueueHeadPointer: %d Status: 0x%4.4x Command: 0x%x\n", request.data[2] >> 16, request.data[2] & 0xFFFF, request.data[3] >> 17, request.data[3] & 0xFFFF);
+                               //bhd32(&request, nt / 4);
 
                                // Write to completion queue doorbell
                                oqueueAdminRx++;
@@ -399,26 +407,30 @@ int NvmeAccess::nvmeProcess(){
                                                return 1;
                                        }
                                }
+                               oqueueReplySem.set();
                        }
                        else if((request.address & 0x00FF0000) == 0x00110000){
                                status = request.data[3] >> 17;
                                dl3printf("NvmeAccess::nvmeProcess: IoCompletion: Queue: %d QueueHeadPointer: %d Status: 0x%4.4x Command: 0x%x\n", request.data[2] >> 16, request.data[2] & 0xFFFF, request.data[3] >> 17, request.data[3] & 0xFFFF);
-                               printf("NvmeAccess::nvmeProcess: IoCompletion: Queue: %d QueueHeadPointer: %d Status: 0x%4.4x Command: 0x%x\n", request.data[2] >> 16, request.data[2] & 0xFFFF, request.data[3] >> 17, request.data[3] & 0xFFFF);
+                               //printf("NvmeAccess::nvmeProcess: IoCompletion: Queue: %d QueueHeadPointer: %d Status: 0x%4.4x Command: 0x%x\n", request.data[2] >> 16, request.data[2] & 0xFFFF, request.data[3] >> 17, request.data[3] & 0xFFFF);
 
                                // Write to completion queue doorbell
                                oqueueDataRx++;
                                if(oqueueDataRx >= oqueueNum)
                                        oqueueDataRx = 0;
 
-                               dl3printf("NvmeAccess::nvmeProcess: Write completion queue doorbell: %d\n", oqueueDataRx);
-                               if(e = writeNvmeReg32(0x100C, oqueueDataRx)){
-                                       printf("Error: %d\n", e);
-                                       return 1;
+                               if(!UseQueueEngine){
+                                       dl3printf("NvmeAccess::nvmeProcess: Write completion queue doorbell: %d\n", oqueueDataRx);
+                                       if(e = writeNvmeReg32(0x100C, oqueueDataRx)){
+                                               printf("Error: %d\n", e);
+                                               return 1;
+                                       }
                                }
+                               oqueueReplySem.set();
                        }
                        else if((request.address & 0x00FF0000) == 0x000800000){
                                dl3printf("NvmeAccess::nvmeProcess: IoBlockWrite: address: %8.8x nWords: %d\n", (request.address & 0x0FFFFFFF), request.numWords);
-                               printf("NvmeAccess::nvmeProcess: IoBlockWrite: address: %8.8x nWords: %d\n", (request.address & 0x0FFFFFFF), request.numWords);
+                               //printf("NvmeAccess::nvmeProcess: IoBlockWrite: address: %8.8x nWords: %d\n", (request.address & 0x0FFFFFFF), request.numWords);
 
                                memcpy(&odataBlockMem[(request.address & 0x0000FFFF) / 4], request.data, request.numWords * 4);
                        }
@@ -475,6 +487,8 @@ int NvmeAccess::pcieWrite(BUInt8 request, BUInt32 address, BUInt32 num, BUInt32*
        int                     nt;
        int                     reqType;
        BUInt8                  err;
+
+       //printf("pcieWrite\n");
        
        // Memory or Config read
        dl2printf("NvmeAccess::pcieWrite address: 0x%8.8x num: %d\n", address, num);
@@ -511,7 +525,7 @@ int NvmeAccess::pcieWrite(BUInt8 request, BUInt32 address, BUInt32 num, BUInt32*
        }
        else {
                // Not sure why this is needed ?
-               usleep(10000);
+               //usleep(1000);
        }
        
        return 0;
index 1275231d1a9c813a4cd8945f03d89a3dea261b55..b5ffc990b7f4285c7612f7a468e5963fa1bad9ae 100644 (file)
@@ -129,7 +129,7 @@ public:
        void            reset();
 
        // Send a queued request to the NVMe
-       int             nvmeRequest(int queue, int opcode, BUInt32 address, BUInt32 arg10, BUInt32 arg11 = 0, BUInt32 arg12 = 0);
+       int             nvmeRequest(Bool wait, int queue, int opcode, BUInt32 address, BUInt32 arg10, BUInt32 arg11 = 0, BUInt32 arg12 = 0);
        
        // NVMe process received requests thread
        int             nvmeProcess();
@@ -173,6 +173,7 @@ protected:
 
        BSemaphore              opacketReplySem;                ///< Semaphore when a reply packet has been received
        NvmeReplyPacket         opacketReply;                   ///< Reply to request
+       BSemaphore              oqueueReplySem;                 ///< Semaphore when a queue reply packet has been received
 
        pthread_t               othread;
        BUInt32                 oqueueNum;
index be08fbb840665b6a81112a0c2fd05732901e61ed..41b818b8161f4dcca97a4443c1122536e8e6af9f 100644 (file)
@@ -581,6 +581,9 @@ static irqreturn_t bfpga_intr_handler(int irq, void *arg){
                        dma_reg_write(dev, dev->dmaChannels[c].registers + DMA_CONTROL, 0);
                        wake_up_interruptible(&dev->dmaChannels[c].event);
                }
+               else if(status){
+                       printk("bfpga_intr_handler: channel: %u had status: 0x%8.8x\n", c, status);
+               }
        }
 
        return 0;
index 3c970b26a1e993e0d9fcf3a8e87eab751e6950fb..45e359e4749055992aa47e1c4e74e2f86c0b082e 100644 (file)
@@ -112,6 +112,7 @@ int Control::test1(){
 int Control::configureNvme(){
        int     e;
        BUInt32 data;
+       BUInt32 cmd0;
 
        printf("Configure Nvme for operation\n");
        
@@ -220,6 +221,8 @@ int Control::configureNvme(){
 
                //dumpNvmeRegisters();
 
+               cmd0 = ((oqueueNum - 1) << 16) | 0x0001;
+
 #ifdef ZAP
                // Test the queue engine
                printf("Create/delete IO queue 1 for replies repeatidly\n");
@@ -228,10 +231,10 @@ int Control::configureNvme(){
                        for(int c = 0; c < 10; c++){
                                printf("Do: %d\n", c);
 
-                               nvmeRequest(0, 0x05, 0x02110000, 0x00070001, 0x00000001);
+                               nvmeRequest(0, 0, 0x05, 0x02110000, cmd0, 0x00000001);
                                sleep(1);
 
-                               nvmeRequest(0, 0x04, 0x02110000, 0x00070001, 0x00000001);
+                               nvmeRequest(0, 0, 0x04, 0x02110000, cmd0, 0x00000001);
                                sleep(1);
                        }
                }
@@ -239,10 +242,10 @@ int Control::configureNvme(){
                        for(int c = 0; c < 10; c++){
                                printf("Do: %d\n", c);
 
-                               nvmeRequest(0, 0x05, 0x00110000, 0x00070001, 0x00000001);
+                               nvmeRequest(0, 0, 0x05, 0x00110000, cmd0, 0x00000001);
                                sleep(1);
 
-                               nvmeRequest(0, 0x04, 0x00110000, 0x00070001, 0x00000001);
+                               nvmeRequest(0, 0, 0x04, 0x00110000, cmd0, 0x00000001);
                                sleep(1);
                        }
                }
@@ -254,29 +257,30 @@ int Control::configureNvme(){
                        if(overbose)
                                printf("Create IO queue 1 for replies\n");
 
-                       nvmeRequest(0, 0x05, 0x02110000, 0x00070001, 0x00000001);
+                       nvmeRequest(1, 0, 0x05, 0x02110000, cmd0, 0x00000001);
 
                        // Create an IO queue
                        if(overbose)
                                printf("Create IO queue 1 for requests\n");
 
-                       nvmeRequest(0, 0x01, 0x02010000, 0x00070001, 0x00010001);
+                       nvmeRequest(1, 0, 0x01, 0x02010000, cmd0, 0x00010001);
                }
                else {
                        // Create an IO queue
                        if(overbose)
                                printf("Create IO queue 1 for replies\n");
 
-                       nvmeRequest(0, 0x05, 0x01110000, 0x00070001, 0x00000001);
+                       nvmeRequest(1, 0, 0x05, 0x01110000, cmd0, 0x00000001);
 
                        // Create an IO queue
                        if(overbose)
                                printf("Create IO queue 1 for requests\n");
 
-                       nvmeRequest(0, 0x01, 0x01010000, 0x00070001, 0x00010001);
+                       nvmeRequest(1, 0, 0x01, 0x01010000, cmd0, 0x00010001);
                }
        }
 #endif
+       usleep(100000);
 
        //dumpNvmeRegisters();
        
@@ -304,10 +308,10 @@ int Control::test3(){
                return e;
 
        printf("Get info\n");
-       //nvmeRequest(0, 0x06, 0x01F00000, 0x00000000);         // Namespace info
-       nvmeRequest(0, 0x06, 0x01F00000, 0x00000001);           // Controller info
+       //nvmeRequest(0, 0, 0x06, 0x01F00000, 0x00000000);              // Namespace info
+       nvmeRequest(0, 0, 0x06, 0x01F00000, 0x00000001);                // Controller info
        printf("\n");
-       sleep(2);
+       sleep(1);
 
        return 0;
 }
@@ -324,8 +328,7 @@ int Control::test4(){
        printf("Perform block read\n");
        memset(odataBlockMem, 0x01, sizeof(odataBlockMem));
 
-       nvmeRequest(1, 0x02, 0x01800000, 0x0000000, 0x00000000, numBlocks-1);   // Perform read
-       usleep(100000);
+       nvmeRequest(1, 1, 0x02, 0x01800000, 0x0000000, 0x00000000, numBlocks-1);        // Perform read
 
        printf("DataBlock:\n");
        bhd32a(odataBlockMem, numBlocks*512/4);
@@ -350,7 +353,7 @@ int Control::test5(){
        for(a = 0; a < 8192; a++)
                odataBlockMem[a] = ((r & 0xFF) << 24) + a;
 
-       nvmeRequest(1, 0x01, 0x01800000, 0x00000000, 0x00000000, numBlocks-1);  // Perform write
+       nvmeRequest(1, 1, 0x01, 0x01800000, 0x00000000, 0x00000000, numBlocks-1);       // Perform write
 
        return 0;
 }
@@ -363,21 +366,29 @@ int Control::test6(){
        BUInt32 t;
        double  r;
        double  ts;
+       BUInt   numBlocks = 262144;
 
+       //numBlocks = 8;
        printf("Test6: Enable FPGA write blocks\n");
        
        if(e = configureNvme())
                return e;
 
        //dumpRegs();
+       
+       // Set number of blocks to write
+       writeNvmeStorageReg(256, numBlocks);
                
        printf("Stats\n");
-       readNvmeStorageReg(32, v);
-       printf("NvmeWrite: status:    %8.8x\n", v);
-       readNvmeStorageReg(36, v);
-       printf("NvmeWrite: numBlocks: %u\n", v);
-       readNvmeStorageReg(40, v);
-       printf("NvmeWrite: timeUs:    %u\n", v);
+       readNvmeStorageReg(256, v);
+       printf("NvmeWrite: dataChunkSize: %8.8x\n", v);
+       readNvmeStorageReg(256+4, v);
+       printf("NvmeWrite: status:        %8.8x\n", v);
+       readNvmeStorageReg(256+8, v);
+       printf("NvmeWrite: numBlocks:     %u\n", v);
+       readNvmeStorageReg(256+12, v);
+       printf("NvmeWrite: timeUs:        %u\n", v);
+
 
        // Start off NvmeWrite engine
        printf("\nStart NvmeWrite engine\n");
@@ -386,9 +397,10 @@ int Control::test6(){
 #ifndef ZAP    
        ts = getTime();
        n = 0;
-       while(n != 262144){
-               readNvmeStorageReg(36, n);
+       while(n != numBlocks){
+               readNvmeStorageReg(256+8, n);
                printf("NvmeWrite: numBlocks: %u\n", n);
+               usleep(100000);
        }
        printf("Time was: %f\n", getTime() - ts);
 #else
@@ -398,63 +410,73 @@ int Control::test6(){
 #ifdef ZAP
        printf("\nPerform block read\n");
        memset(odataBlockMem, 0x0, sizeof(odataBlockMem));
-       nvmeRequest(1, 0x02, 0x01800000, 0x0000000, 0x00000000, 3);     // Four blocks
+       nvmeRequest(0, 1, 0x02, 0x01800000, 0x0000000, 0x00000000, 7);  // Four blocks
        usleep(100000);
 
        printf("DataBlock:\n");
-       bhd32(odataBlockMem, 1*512/4);
+       bhd32(odataBlockMem, 8*512/4);
 #endif
-       
-       printf("Stats\n");
-       readNvmeStorageReg(32, v);
-       printf("NvmeWrite: status:    %8.8x\n", v);
-       readNvmeStorageReg(36, n);
-       printf("NvmeWrite: numBlocks: %u\n", n);
-       readNvmeStorageReg(40, t);
-       printf("NvmeWrite: timeUs:    %u\n", t);
-       
-       r = (4096.0 * n / (1e-6 * t));
-       printf("NvmeWrite: rate:      %f MBytes/s\n", r / (1024 * 1024));
 
-       return 0;
-}
 
-int Control::test7(){
-       int     e;
-       int     a;
-       BUInt32 r;
-       int     numBlocks = 8;
-       
-       printf("Test7: Write blocks, 4 at a time\n");
-       
-       if(e = configureNvme())
-               return e;
+#ifdef ZAP
+       // Start off NvmeWrite engine
+       printf("\nStart NvmeWrite engine\n");
+       writeNvmeStorageReg(4, 0x00000000);
+       writeNvmeStorageReg(4, 0x00000004);
 
-       srand(time(0));
-       r = rand();
-       printf("Perform block write with: 0x%2.2x\n", r & 0xFF);
-       for(a = 0; a < 8192; a++)
-               odataBlockMem[a] = ((r & 0xFF) << 24) + a;
+#ifndef ZAP    
+       ts = getTime();
+       n = 0;
+       while(n != numBlocks){
+               readNvmeStorageReg(256+8, n);
+               printf("NvmeWrite: numBlocks: %u\n", n);
+               usleep(100000);
+       }
+       printf("Time was: %f\n", getTime() - ts);
+#else
+       sleep(2);
+#endif
 
-       nvmeRequest(1, 0x01, 0x01800000, 0x00000000, 0x00000000, numBlocks-1);  // Perform write
-       nvmeRequest(1, 0x01, 0x01801000, 0x00000000, 0x00000000, numBlocks-1);  // Perform write
-       nvmeRequest(1, 0x01, 0x01802000, 0x00000000, 0x00000000, numBlocks-1);  // Perform write
-       nvmeRequest(1, 0x01, 0x01803000, 0x00000000, 0x00000000, numBlocks-1);  // Perform write
+#ifndef ZAP
+       printf("\nPerform block read\n");
+       memset(odataBlockMem, 0x0, sizeof(odataBlockMem));
+       nvmeRequest(0, 1, 0x02, 0x01800000, 0x0000000, 0x00000000, 7);  // Four blocks
+       usleep(100000);
 
-       sleep(2);
+       printf("DataBlock:\n");
+       bhd32(odataBlockMem, 8*512/4);
+#endif
+#endif
+
+
+
+
+       printf("Stats\n");
+       readNvmeStorageReg(256, v);
+       printf("NvmeWrite: dataChunkSize: %8.8x\n", v);
+       readNvmeStorageReg(256+4, v);
+       printf("NvmeWrite: status:        %8.8x\n", v);
+       readNvmeStorageReg(256+8, n);
+       printf("NvmeWrite: numBlocks:     %u\n", n);
+       readNvmeStorageReg(256+12, t);
+       printf("NvmeWrite: timeUs:        %u\n", t);
        
+       r = (4096.0 * n / (1e-6 * t));
+       printf("NvmeWrite: rate:      %f MBytes/s\n", r / (1024 * 1024));
+
        return 0;
 }
 
-int Control::test8(){
+int Control::test7(){
        int     e;
        int     a;
        BUInt32 v;
        BUInt32 i;
        int     n;
-       int     numBlocks = 1000;
+       //BUInt numBlocks = 262144;
+       BUInt   numBlocks = 10000;
        
-       printf("Test8: Validate 4k blocks\n");
+       printf("Test7: Validate 4k blocks\n");
        
        if(e = configureNvme())
                return e;
@@ -463,8 +485,7 @@ int Control::test8(){
        for(n = 0; n < numBlocks; n++){
                printf("Test Block: %u\n", n);
                memset(odataBlockMem, 0x01, sizeof(odataBlockMem));
-               nvmeRequest(1, 0x02, 0x01800000, n * 8, 0x00000000, 7); // Perform read
-               usleep(100000);
+               nvmeRequest(1, 1, 0x02, 0x01800000, n * 8, 0x00000000, 7);      // Perform read
 
                for(a = 0; a < 4096 / 4; a++, v++){
                        if(odataBlockMem[a] != v){
@@ -493,28 +514,28 @@ int Control::test_misc(){
                return e;
 
        printf("Get info\n");
-       nvmeRequest(0, 0x06, 0x01F00000, 0x00000001);
+       nvmeRequest(0, 0, 0x06, 0x01F00000, 0x00000001);
        sleep(1);
 
        printf("\nGet namespace list\n");
-       nvmeRequest(0, 0x06, 0x01F00000, 0x00000002);
+       nvmeRequest(0, 0, 0x06, 0x01F00000, 0x00000002);
        sleep(1);
 
        printf("\nSet asynchonous feature\n");
-       nvmeRequest(0, 0x09, 0x01F00000, 0x0000000b, 0xFFFFFFFF);
+       nvmeRequest(0, 0, 0x09, 0x01F00000, 0x0000000b, 0xFFFFFFFF);
        sleep(1);
 
        printf("\nGet asynchonous feature\n");
-       nvmeRequest(0, 0x0A, 0x01F00000, 0x0000000b);
+       nvmeRequest(0, 0, 0x0A, 0x01F00000, 0x0000000b);
        sleep(1);
 
 
        printf("\nGet log page\n");
-       nvmeRequest(0, 0x02, 0x01F00000, 0x00100001, 0x00000000, 0);
+       nvmeRequest(0, 0, 0x02, 0x01F00000, 0x00100001, 0x00000000, 0);
        sleep(1);
 
        printf("\nGet asynchonous event\n");
-       nvmeRequest(0, 0x0C, 0x00000000, 0x00000000, 0x00000000, 0);
+       nvmeRequest(0, 0, 0x0C, 0x00000000, 0x00000000, 0x00000000, 0);
        sleep(1);
 
        return 0;
@@ -622,9 +643,6 @@ int main(int argc, char** argv){
                else if(!strcmp(test, "test7")){
                        err = control.test7();
                }
-               else if(!strcmp(test, "test8")){
-                       err = control.test8();
-               }
                else if(!strcmp(test, "test_misc")){
                        err = control.test_misc();
                }
index 4725e61f3d4ba4d63a8d2ce57f5d2659dbfd3972..40b7eaa715dc5e9bae6f1ac6fb93e7db751f4b8c 100644 (file)
Binary files a/source/DuneNvmeTest/doc/Readme.pdf and b/source/DuneNvmeTest/doc/Readme.pdf differ