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Message-ID: <4492CD00.5080804@cern.ch>
Date: Fri, 16 Jun 2006 17:23:44 +0200
From: Jeroen Belleman <Jeroen.Belleman@cern.ch>
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To: Terry Barnaby <terry@beam.ltd.uk>
CC: Uli Raich <Uli.Raich@cern.ch>
Subject: Re: Technical Specification for a new trajectory measurement system
 for the CERN Proton Synchrotron
References: <44912136.8020204@beam.ltd.uk> <44918141.7010705@cern.ch> <4492C30A.7000501@beam.ltd.uk>
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Terry Barnaby wrote:
> Hi Jeroen,
> 
> Thanks for the info that clears up a lot of my questions bar the
> digital timing systems of course.
> 
> I wonder if it would be Ok to visit you to have a look at where
> the system would be installed and ask any other relevent questions ?
> I could probably make, depending on air flights, Tuesday 20th or perhaps 
> Wednesday 21st next week if that would be ok for you ?
> 

Yes, you are welcome, and those dates are OK.

Now that I'm at it, I'll dig into the timing issues too:

In the present system, the timing signals are a hodge-podge of
different signal levels. In the context of this project, I must
synchronise them to the sampling clock of the acquisition system
and I might as well reduce them all to the same standard. Let's just
fix the principle that they'll be piped around on standard 50 Ohm
coax and must be terminated. We still have some freedom to select
levels. I'll provide the required fan-out for distribution.

Apart from the three analogue pick-up signals, the inputs are:
- Fref
- Start of Cycle (SCY)
- Calibration start (CAL_START)
- Calibration Stop (CAL_STOP)
- Injection (INJ)
- Harmonic changes (H-CHANGE)
- End of Last Flat Top (ELFT)
- 10MHz
- SPARE

I believe we'd best reconstruct the C-timing using SCY, ELFT and the
10MHz clock, rather than use the one coming out of our timing modules,
because the latter drifts back and forth by some 240ns. (It has its own
internal clock, independent of everything else.)

Fref should be sampled at the ADC sampling rate, and I'll let you do
that. INJ is a bit special in that it is aligned with 8*Frev and it
marks the injection of the first bunch of particles. The other six
timing signals will be synchronised to the (very accurate) 10MHz
clock. If that same clock also serves to create the ADC sampling
frequency, the system should be free of race conditions.

Note that there may be up to six HCHANGE events per cycle, at present.
That number may evolve. Usually they are spaced by at least 20ms.

We currently use no Ejection event, but that's what the SPARE input
could be used for.

Best regards,
Jeroen Belleman